2022
DOI: 10.1007/s11227-022-04740-9
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Design of novel area-efficient coplanar reversible arithmetic and logic unit with an energy estimation in quantum-dot cellular automata

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Cited by 4 publications
(2 citation statements)
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“…This ALU has 220 cells, a 2-clock cycle delay, and a 0.1 µm 2 area with thermal stability. A coplanar QCA-based reversible ALU is realized in [34] using Double Peres Gate and Feynman gate with an optimum area of 0.1 µm 2 , Cell count is 118, Latency is 2.5 and it performs 19 different arithmetic logic operations.…”
Section: Literature Reviewmentioning
confidence: 99%
“…This ALU has 220 cells, a 2-clock cycle delay, and a 0.1 µm 2 area with thermal stability. A coplanar QCA-based reversible ALU is realized in [34] using Double Peres Gate and Feynman gate with an optimum area of 0.1 µm 2 , Cell count is 118, Latency is 2.5 and it performs 19 different arithmetic logic operations.…”
Section: Literature Reviewmentioning
confidence: 99%
“…There are four clock phases: switch, hold, release, and relax, as shown in Fig. 2 10 , 11 . In the first phase, the QCA cells will get depolarized as tunnelling potential barriers are low.…”
Section: Introductionmentioning
confidence: 99%