Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL

Abstract

Asynchronous adiabatic logic (AAL) is a novel lowpower design technique which combines the energy saving benefits of asynchronous systems with adiabatic benefits. In this paper, energy efficient full adder using double pass transistor with asynchronous adiabatic logic (DPTAAL) is used to design a low power multiplier. Asynchronous adiabatic circuits are very low power circuits to preserve energy for reuse, which reduces the amount of energy drawn directly from the power supply. In this work, an 8×8 multiplier using DPTAAL is designed and simulated, which exhibits low power and reliable logical operations. To improve the circuit performance at reduced voltage level, double pass transistor logic (DPL) is introduced. The power results of the proposed multiplier design are compared with the conventional CMOS implementation. Simulation results show significant improvement in power for clock rates ranging from 100 MHz to 300 MHz.

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“…HSPICE simulations, the work in[59] compared the power consumption of circuits implemented in CMOS and double pass transistor with asynchronous adiabatic logic (DPTAAL) technologies for different operating frequencies to show that DPTAAL consumes less power. Analyzing the reported results, it is clear that for different logic designs, the power consumption of a multiplier is 15 times the power consumption of an adder for the same word length using the 0.18 m CMOS.…”

“…Operations power consumptionfor[54][55][56][57][58] and[59,60], we can present an estimate of the relative power consumption for each operation as shown in table 6.…”