Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems
DOI: 10.1109/apcas.1996.569220
|View full text |Cite
|
Sign up to set email alerts
|

Design of integrated continuous-time filters with low group-delay sensitivities

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Publication Types

Select...
1
1

Relationship

0
2

Authors

Journals

citations
Cited by 2 publications
(1 citation statement)
references
References 6 publications
0
1
0
Order By: Relevance
“…Since the absolute value of the group delay can be electronically adjusted in the filter using integrators with variable characteristics, the flatness of the group delay is of special interest. It is well known that all sensitivities of the group delay for each element cannot be zero in an active RC circuit [10]. Hence, it is difficult to reduce the effect of the parasitic capacitance by making the element sensitivity small for all C i and G i .…”
Section: Configuration Example and Computer Simulationmentioning
confidence: 99%
“…Since the absolute value of the group delay can be electronically adjusted in the filter using integrators with variable characteristics, the flatness of the group delay is of special interest. It is well known that all sensitivities of the group delay for each element cannot be zero in an active RC circuit [10]. Hence, it is difficult to reduce the effect of the parasitic capacitance by making the element sensitivity small for all C i and G i .…”
Section: Configuration Example and Computer Simulationmentioning
confidence: 99%