Design of High Speed and Area Efficient N-Bit Digital Comparator

Abstract

A digital comparator is a hardware electronic device or a combinational logic circuit. It is capable of comparing two numbers as input in binary form and determines the output. In the previous designs like in the design of XOR-XNOR(XE) with cross-coupled p-MOS, even though it occupies less area, the full swing output voltage can’t be able to produce which creates a problem when the bit width increases. To avoid this kind of disadvantages we are designing a N-bit digital comparator in a way such that it produces full swing output voltage with the improved power efficiency as well as the transistor count in the circuit also decreases. So that it can be used in several applications like scientific computations and test circuit applications etc.