Design of high performance double precision hybrid ALU for SoC applications

Ravi, S.; Adig,; Kittur, Harish M.

doi:10.1109/icmdcs.2017.8211610

Cited by 1 publication

(1 citation statement)

References 9 publications

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“…A double-precision hybrid ALU with high performance that consists of two architectures, the first of which is a semi-FP unit (Semi-FPU) and the second of which is a floating point unit (FPU), has been proposed by S. Ravi [17] in their design. While FPU uses a 64-bit DPU input, semi-FPU uses a 32-bit input, both of them give a 64-bit DPU output.…”

Section: Literature Surveymentioning

confidence: 99%

Custom Ip Design and Verification for Ieee754 Single Precision Floating Point Arithmetic Unit

Dharmavaram,

2024

AEJ

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The compact and accurate way of representing numbers in a wide range is the advantage of floating-point (FP) representation and computation. The floating-point digital signal processors offer the IPs that should have the features of low power, high performance, and less area in cost-effective designs. The proposed paper demonstrates the design and implementation of a 32-bit floating-point arithmetic unit (FPAU). The arithmetic operations performed by the FPAU are in the IEEE 754 single precision format for FP numbers. Before performing the 32-bit FP arithmetic operations, the input operands are converted to IEEE 754 single precision. In order to make use of this functional unit in the processor designs, the proposed work discuss about the creation of custom IP. The validation and verification of this IP will be done with the Xilinx Vivado Design software. Here, the verification is performed with VIO hardware debug IP and Zed board. This FPAU IP can be used in DSP applications and can also be used as a floating-point arithmetic block in semi-custom microprocessor and microcontroller designs.

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Section: Literature Surveymentioning

confidence: 99%

Custom Ip Design and Verification for Ieee754 Single Precision Floating Point Arithmetic Unit

Dharmavaram,

2024

AEJ

View full text Add to dashboard Cite

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Design of high performance double precision hybrid ALU for SoC applications

Cited by 1 publication

References 9 publications

Custom Ip Design and Verification for Ieee754 Single Precision Floating Point Arithmetic Unit

Custom Ip Design and Verification for Ieee754 Single Precision Floating Point Arithmetic Unit

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