2018
DOI: 10.1007/978-3-319-68161-0
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Design of FPGA-Based Computing Systems with OpenCL

Abstract: the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific … Show more

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Cited by 33 publications
(23 citation statements)
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“…FPGAs can be utilized similarly; however, in most cases, the single work item is the preferred model. FPGAs have a different architecture that can be adapted to create an effective pipeline structure where data can be shared among multiple pipelined loop iterations using a high-speed access private memory (Waidyasooriya et al, 2018). This is a favored model because its data dependencies slow the use of the multiple threads model, particularly when costly mechanisms, such as a barrier, are used to preserve dependencies between active threads.…”
Section: Task-parallel Model (Single Work Item)mentioning
confidence: 99%
See 1 more Smart Citation
“…FPGAs can be utilized similarly; however, in most cases, the single work item is the preferred model. FPGAs have a different architecture that can be adapted to create an effective pipeline structure where data can be shared among multiple pipelined loop iterations using a high-speed access private memory (Waidyasooriya et al, 2018). This is a favored model because its data dependencies slow the use of the multiple threads model, particularly when costly mechanisms, such as a barrier, are used to preserve dependencies between active threads.…”
Section: Task-parallel Model (Single Work Item)mentioning
confidence: 99%
“…Below is a summary of the differences between the task-parallel model and the data-parallel model (NDRange model) (Waidyasooriya et al, 2018):…”
Section: Task-parallel Model (Single Work Item)mentioning
confidence: 99%
“…A work-item can be executed by one or more PEs as part of the same work-group. In addition, an OpenCL platform provides an environment for hostaccelerator interaction, as well as memory and accelerator management [17]. An OpenCL platform may support multiple accelerators executed on OpenCL-compatible devices, which may come from various vendors (e.g., Xilinx, Intel, or NVIDIA).…”
Section: A Opencl Platform Descriptionmentioning
confidence: 99%
“…For example, an OpenCL design may contain multiple complex functions and computations, including loading and storing from either onchip or off-chip memories. Performing these functions can lead to a degradation in performance if they are not implemented judiciously [17]. Another drawback of OpenCL-based FPGA accelerators is that designers using them lose the low-level observability of their designs after compiling to low-level HDL descriptions.…”
Section: Introductionmentioning
confidence: 99%
“…Recently, OpenCL-based FPGA design [3] has been introduced to design accelerators using C-like high-level programming. This design method allows us to exploit the full potential of an FPGA while reducing the design time [4]. OpenCL is not only can be used to design FPGA accelerator, but also can be used to design a whole heterogeneous system including the computations of a CPU and also the data transfers between a CPU and an FPGA.…”
Section: Introductionmentioning
confidence: 99%