Design of compact-diode-SCR with low-trigger voltage for full-chip ESD protection

Gao, Yuexin; Cai, X.; Han, Zhengsheng; Zeng, Chong; Xia, Ruirui; Tang, Yun; Gao, Mali; Li, Bo

doi:10.1016/j.microrel.2022.114860

Cited by 2 publications

(2 citation statements)

References 22 publications

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“…Figure 1 shows a typical architecture of a whole-chip ESD protection circuit. [3][4][5] The power-rail ESD clamp circuit is used to discharge the ESD current from VDD to VSS, [6][7][8] and the protection devices can help to deal with the ESD current from I/O Pad to the power rail to avoid excessive ESD current from entering the internal circuit and causing it to burn out. [9][10][11] Due to the large ESD current, the thicker top metal in the CMOS process is used to connect the protection devices and the power rail.…”

Section: Introductionmentioning

confidence: 99%

Characterization of ESD-induced electromigration on CMOS metallization in on-chip ESD protection circuit

Hou,

Lin

2024

Jpn. J. Appl. Phys.

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Electrostatic Discharge (ESD) and electromigration are critical issues that significantly impact the reliability of integrated circuits (ICs). While both of these phenomena have been studied independently, the combination of the two, ESD-induced electromigration, has received less attention. This work analyzes various types of metal with different lengths, widths, and angles commonly used in ESD protection circuits in the CMOS process. The objective is to observe their behavior under continuous ESD zapping. The ESD-induced electromigration of metallization in the CMOS process has been analyzed, and metal sensitivity to system-level ESD events has also been identified. It is also analyzed from the perspective of energy that the ESD energy that metal can withstand will decrease as the ESD voltage increases, which will be even more detrimental to the ESD reliability of ICs. The findings from this study aim to provide valuable insights for designing metal lines in ICs to enhance ESD protection.

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Section: Introductionmentioning

confidence: 99%

Characterization of ESD-induced electromigration on CMOS metallization in on-chip ESD protection circuit

Hou,

Lin

2024

Jpn. J. Appl. Phys.

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“…Electrostatic discharge (ESD) is the major cause of IC failure in manufacturing, transportation, PCB mounting, and the operation of electronic products [1]. With the development of ultra-low-power integrated circuits, the operation voltage has been down-scaled continuously from the 5 V TTL-compatible voltage to 3.3 V, then 1.2 V, and now 0.8 V for low-power ICs [2][3][4][5]. A bidirectional ESD device is needed for protecting pins with an operating voltage varying between positive and negative values, and a bidirectional silicon-controlled rectifier (BSCR) capable of operating in the NS and PS modes of ESD stresses is suitable for such an application [6].…”

Section: Introductionmentioning

confidence: 99%

High Area Efficiency Bidirectional Silicon-Controlled Rectifier for Low-Voltage Electrostatic Discharge Protection

Chen,

Zhao,

Zhou

et al. 2023

Electronics

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Continuously scaling down and decreasing operation voltages of ICs, from the 5 V TTL-compatible voltage to 3.3 V, then 1.2 V, and now 0.8 V for low-power ICs, results in more stringent electrostatic discharge protection design requirements, such as a narrow ESD design window, low operation voltage, and high ESD robustness. Based on traditional diode string and diode-triggered silicon-controlled rectifiers, an enhanced diode-triggered silicon-controlled rectifier is proposed to meet the requirements of low-voltage integrated circuits as bidirectional electrostatic discharge protection. The new device employs an additional PMOS and NMOS in the N-well and P-well, respectively, to offer additional current paths along the surface to significantly enhance its robustness. TCAD simulation shows that the device is triggered by both the diode strings and embedded MOS, making the device turn on faster and the current distribution more uniform during the ON state owing to the additional surface current paths. The proposed new device has excellent dual-directional ESD protection performance with a figure of merit of 4.01 mA/um2, which is about a 71% improvement compared with the conventional diode-triggered silicon-controlled rectifier. It also has higher area efficiency, lower trigger voltage, lower current leakage, and a faster turn-on speed. The proposed enhanced diode-triggered silicon-controlled rectifier is an attractive ESD protection solution for ultra-low-voltage ICs.

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Design of compact-diode-SCR with low-trigger voltage for full-chip ESD protection

Cited by 2 publications

References 22 publications

Characterization of ESD-induced electromigration on CMOS metallization in on-chip ESD protection circuit

Characterization of ESD-induced electromigration on CMOS metallization in on-chip ESD protection circuit

High Area Efficiency Bidirectional Silicon-Controlled Rectifier for Low-Voltage Electrostatic Discharge Protection

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