Design of CMOS broadband transimpedance amplifiers for 10Gbit/s optical communications

Zheng, Le

doi:10.32657/10356/13323

Cited by 2 publications

(6 citation statements)

References 101 publications

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“…With the rapid progress of nowadays nano-scale CMOS technology, however, the challenges in operating frequency have been solved effectively. Many designs working with tens of Gbps have been reported extensively, which also include many design techniques such as inductive peaking, the regulated cascode (RGC), noise canceling, etc [1][2][3][4][5][6][7][8][9][10][11][12][13][14]. However, as a complex analog building block, several challenges still remain.…”

Section: Introductionmentioning

confidence: 99%

Design of wide-band high-linearity transimpedance amplifier using standard CMOS technology

Gu,

Wang,

et al. 2023

Journal of Electrical Engineering

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In this paper, the design methodology of a high-linearity wide-band transimpedance amplifier (TIA) for cable television (CATV) application is addressed. A simple four-stage topology is proposed to maintain a well-balanced linearity over a wide operating band. The regulated cascode (RGC) input stage is used to match an input impedance of 75 Ω, followed by a gain stage with enhanced bandwidth. The high-linearity output stage is able to drive the 75 Ω load directly with high output swing under a high supply voltage. The prototype is implemented with a standard 0.11μm CMOS process while occupying the silicon area of 0.034 mm2. The measurement results for the prototype show a peak gain of 76.6 dBΩ over a 3-dB bandwidth of 1.1 GHz with a considerably small gain ripple and an OIP 3 of 20.4 dBm. The whole test chip consumes 447 mW DC power and the measured average input-referred noise current spectral density is 7.9 pA Hz−1/2 up to 1 GHz.

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Section: Introductionmentioning

confidence: 99%

Design of wide-band high-linearity transimpedance amplifier using standard CMOS technology

Gu,

Wang,

et al. 2023

Journal of Electrical Engineering

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“…Accounting the correlation between gate noise and drain noise sources to cancel the total equivalent noise, the overall equivalent input noise current is to be smaller than derived in . According to [44], the equivalent input noise current is to be:…”

Section: Noise Analysis Of Common Gate Tia Input Stagementioning

confidence: 99%

“…In deep submicron devices, the magnitude of the correlation coefficient |c| can take a value of more than 0.75, which can help to reduce the total input noise significantly for optimum transistor size according to [43]. such as the one found in [45] and [44].…”

Section: Noise Analysis Of Common Gate Tia Input Stagementioning

confidence: 99%

“…The proposed circuit in [45] is given in Figure 4-13: The proposed implementation in [44] is given in Figure 4-14: The noise analysis shows that the equivalent noise current spectral density of the entire circuit is approximately given by the following equation 4-48:…”

Section: Noise Analysis Of Rgc Tia Input Stagementioning

confidence: 99%

“…In (40)(41)(42)(43)(44)(45)(46)(47)(48), the third term shows that the estimated input-referred-noise current will be directly related to the photodiode capacitance at high frequency with power of two. With a large photodiode capacitance, the large noise at high frequency is inevitable.…”

Section: Rgc Input Stagementioning

confidence: 99%

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Design of CMOS front-end receiver for wideband optical communication systems

Chen¹

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First and foremost, I gratefully extend my most sincere appreciation and deepest gratitude to my supervisor, Professor Yeo Kiat Seng, for giving me the opportunity to undertake this challenging and rewarding research project. His time, effort, support, constructive advice and valuable guidance as well as encouragement in the course of my Ph.D. candidature are deeply appreciated and will always be remembered. Special thanks also go out to the technical and support staff in NTU, School of EEE, and Centre for Integrated Circuits and Systems, for the countless help they have provided. Last but not least, I dedicate this piece of work to my family and all my friends, who believe in me and stood by me especially at times when I was facing difficulties and frustrations in accomplishing this research work. Their suggestions and encouragement had helped me tremendously in overcoming all the problems.

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Design of CMOS broadband transimpedance amplifiers for 10Gbit/s optical communications

Cited by 2 publications

References 101 publications

Design of wide-band high-linearity transimpedance amplifier using standard CMOS technology

Design of wide-band high-linearity transimpedance amplifier using standard CMOS technology

Design of CMOS front-end receiver for wideband optical communication systems

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