2009
DOI: 10.1088/1674-4926/30/4/045004
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Design of an ultra-low-power digital processor for passive UHF RFID tags

Abstract: A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods like system-level power management, global clock gating and low voltage implementation, the total power of the design is reduced to a few microwatts. In addition, an innovative way for the design of a true RNG is presented, which contributes to both low power and secure data transaction. The digi… Show more

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Cited by 6 publications
(3 citation statements)
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“…The results showed that around 80% of the total power consumption was dissipated as heat. Since the power dissipated in a CMOS circuit accounts for more than 75% of the power consumption for recent technologies [53], the obtained results are satisfactory.…”
Section: Discussionmentioning
confidence: 64%
“…The results showed that around 80% of the total power consumption was dissipated as heat. Since the power dissipated in a CMOS circuit accounts for more than 75% of the power consumption for recent technologies [53], the obtained results are satisfactory.…”
Section: Discussionmentioning
confidence: 64%
“…In a modern embedded system circuit the major portion of power is consumed by clock transitions which resulting from the charging and discharging capacitances of load [8]. This problem of clock transitions in any part of circuit can be avoided using different clocking strategies.…”
Section: Background and Motivationmentioning
confidence: 99%
“…Almost every recent research work concerning passive long range UHF RFID tags uses this communication protocol; e.g. : (Yan et al, 2006;Barnett et al 2007;Man et al, 2007;Ricci et al, 2008;Zhang et al, 2008;Roostaie et al 2008;Wanggen et al 2009). Thus, this chapter is focused in the C1G2 standard.…”
Section: Introductionmentioning
confidence: 99%