2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI) 2018
DOI: 10.1109/sbcci.2018.8533222
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Design of an RF Six-Mode CMOS Power Amplifier for Efficiency Improvement at Power Backoff

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Cited by 2 publications
(6 citation statements)
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“…Such design provides a range of operating modes between low-gain and highgain modes. The work in [21] has been recently extended in order to consider both stages being reconfigurable [12]. Such combination is controlled by six digital switches, three at each stage, yielding 64 possible operating modes with different gains, power levels, linearity and power consumption.…”
Section: A Related Workmentioning
confidence: 99%
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“…Such design provides a range of operating modes between low-gain and highgain modes. The work in [21] has been recently extended in order to consider both stages being reconfigurable [12]. Such combination is controlled by six digital switches, three at each stage, yielding 64 possible operating modes with different gains, power levels, linearity and power consumption.…”
Section: A Related Workmentioning
confidence: 99%
“…Such combination is controlled by six digital switches, three at each stage, yielding 64 possible operating modes with different gains, power levels, linearity and power consumption. The PA in [12] admits the power gain to vary from 18 dB to 31 dB, the output 1 dB compression point varies from 7.5 dBm to 16.9 dBm, whereas the power consumption can be as low as 153 mW, up to 394 mW in high-power modes. This PA provides significant reconfigurability for the 2.4 GHz band.…”
Section: A Related Workmentioning
confidence: 99%
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