Design of an RF output Class JJ⁻¹ Doherty power amplifier using post‐matching varactor diodes for configurable IoT transmitters

Abstract

In this paper, a Doherty power amplifier (DPA) based on Class-J power amplifier (PA) and Class-J À1 PA is proposed for configurable Internet of things (IoT) transmitters. A post-matching structure is used to achieve wider bandwidth performance, high efficiency, and power gain flatness. Different drain biases on the main and peaking devices are used to perform asymmetric operations. The proposed DPA structure achieves 62.4% power-added efficiency (PAE) with a maximum output range of 37.38-38.20 dBm for the frequency band of 5.1-5.8 GHz and a power gain range of 13.24-12.24 dB. It has a maximum drain efficiency of 42.7%-51.5% at a back-off power level of 9 dB. In order to validate the linearity of the proposed design, an analysis of the adjacent channel leakage ratio (ACLR) for various gate-biased voltage operations is performed. The microchip occupies a compact die area of 2.1 mm  1.2 mm, which is fabricated with GaAs 0.25 μm PHEMT to validate the enhanced broadband characteristics of the proposed configuration. Compared to the existing DPAs, the proposed DPA exhibits higher efficiency, output power, and compact size. K E Y W O R D SDoherty power amplifier (DPA), gallium arsenide (GaAs), post-matching network, poweradded efficiency (PAE), stacked FET