Design of an one-cycle decompression hardware for performance increase in embedded systems

Abstract

Code compression is known as an effective technique to reduce instruction memory size on an embedded system. However, code compression can also be very effective in increasing processorto-memory bandwidth and hence provide increased system performance. In this paper we describe our design and design methodology of the first running prototype of a one-cycle code decompression unit that decompresses compressed instructions on-thefly. We describe in detail the architecture that enables decompression of multiple instructions in one cycle and we present the design methodologies and tools used. The stand-alone decompression unit does not require any modifications on the processor core. We observed up to 63% performance increase with 25% in average over a wide variety of applications running on the hardware prototype under various system configurations.

An efficient code compression for MIPS32 processor using dictionary and bit-mask based static and dynamic frequency algorithm

“…All these concepts focus on reducing the size of the application at the cost of potential performance degradation. Lekatsas et al (2002) proposed a technique which takes advantage of compressing words with higher frequencies using dictionary-based technique for code compression. However, code size Netto et al (2004) proposed an approach to mix static and dynamic instruction profiling to effectively exploit size performance tradeoff by using a multi-profile-based compression technique.…”

Instruction splitting for efficient code compression

“…Therefore, a key challenge in designing high volume, cost effective embedded systems is to host this vast amount of software in an efficient way. This can be done by using code compression which, besides memory size reduction, may also reduce the power consumption since memories consume a significant amount of an embedded system's power budget [4,19,18,17]. First approaches to designing compact embedded systems have been proposed in the early 1990s.…”

Algoritmos para compressão de microcodigo

“…Trabalhos Relacionados de instruções na cache. Um fato interessante é que o código comprimido permite que mais instruções sejam trazidas da memória com uma quantidade menor de acessos à mesma, e alguns resultados mostram ganho de desempenho e até mesmo economia de energia quando se utiliza compressão de código [17,21,84,102].…”