2017 4th International Conference on Signal Processing and Integrated Networks (SPIN) 2017
DOI: 10.1109/spin.2017.8049994
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Design of an low power miller compensated two stage OP-AMP using 45 nm technology for high data rate communication

Manash Pratim Sarma
1
,
Nilotpal Kalita
2
,
Nikos E. Mastorakis
3
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Cited by 3 publications
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A Novel Technique of Enhancing CMRR of Fully- Differential Instrumentation Amplifier Using High Gain CMFB Loop

Sahu
1
,
Kundu
2
,
Kumar
3
2022
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)
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A Novel Technique of Enhancing CMRR of Fully- Differential Instrumentation Amplifier Using High Gain CMFB Loop

Sahu
1
,
Kundu
2
,
Kumar
3
2022
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)
0
0
0
0
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A Novel Design of High Performance Two-Stage Operational Amplifier using CMOS Technology

Ganesh,
Kumar,
Ramya
et al. 2024
2024 International Conference on Integrated Circuits and Communication Systems (ICICACS)
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Design Analysis of 3-Bit Flash ADC using Low-Offset and Low-Power Opamp

Saxena
1
,
Yadav
2
,
Wairya
3
2023
2023 10th International Conference on Signal Processing and Integrated Networks (SPIN)
2
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