Design of an Energy Efficient Voltage-to-Time Converter with Rectified Linear Unit Characteristics for Artificial Neural Networks

Finkbeiner, Jakob; Nagele, Raphael; Berroth, Manfred

doi:10.1109/newcas52662.2022.9842074

Cited by 2 publications

(1 citation statement)

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“…An all-analog approach requires an analog implementation for this operation. In a previous work [21], we presented such a voltage-to-time converter (VTC) with an inherent ReLU like transfer function. It is capable of providing pulses with several bit resolution down to 20 ps with a sub-fJ energy consumption per operation.…”

Section: All-analog Neural Layer Processing Macromentioning

confidence: 99%

Analog Multiply-Accumulate Cell With Multi-Bit Resolution for All-Analog AI Inference Accelerators

Nagele

Finkbeiner

Stadtlander

et al. 2023

IEEE Trans. Circuits Syst. I

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Mixed-signal AI accelerators offer the possibility of higher energy efficiency for moderate resolution computations compared to their digital counterparts. All-analog implementations, where all operations are performed in the analog domain, can further improve this energy advantage. An energy efficient multiply-accumulate cell for all-analog neural layer processing macros is presented. The proposed analog two-quadrant multiplier circuit consists of two complementary MOSFETs where the pulse width modulated input activation is applied to the gates and the weight signal to the isolated back-gate. The analog multi-bit resolution weight is dynamically stored on a memory capacitor. The multiply-accumulate operation result is represented by charge accumulated on a summation line and drawn from or put onto a computation capacitance. Simulation results based on a 22 nm FD-SOI CMOS technology show that the cell consumes about 0.67 fJ for a circuit-level multiply-accumulate operation. An area efficiency of 166 × 10 12 MAC/s/mm 2 is achieved.

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Section: All-analog Neural Layer Processing Macromentioning

confidence: 99%