Design of an adaptive power controller for improving THD performance of integrated-parallel buck-boost converter via efficient reverse power routing

Abstract

Parallel buck-boost converters are high-output DC-to-DC converters. It is increased by inverting the voltage and decreasing the circuit current capacity. The duty cycle of switching transistors governs converter voltage. Output current moderates THD in these converters. Additional current losses cause output voltage and current harmonics. Inductors, capacitors, MOSFETs, and other power control filtering models reduce excessive current and THD. Complex models lose scalability and stability. Real-time buck-boost controllers can't use them. Filtered adaptive power controller blocks reduce buck-boost converter response time and inject improper frequency components at the output. A reverse power routing model with an adaptive power controller is proposed to estimate excessive output power and improve converter performance. Reverse power control lowers THD by 20% and increases power throughput. When output power drops, the adaptive power controller (APC) changes ON/OFF duty cycles. The proposed model reduced THD and maintained high output voltage and current in both continuous and discontinuous modes. Context-aware circuit design measured output ripples, harmonics, smoothness factor, and power loss. The proposed parallel buck-boost converter had 10% lower jitters, 23% better harmonic outputs, 15% better smoothness, and 5% lower total power loss than others. The model handles high-density electrical loads with maximum power throughput.