Abstract:In dual-loops clock and data recovery (CDR) circuit design, lock detector is crucial in controlling the switching within CDR loop. The setting of the frequency accuracy of lock detector is a tough task as large ppm will leads to a longer lock time for phase tracking loop and small ppm will leads to more switching time between the loops. A novel lock detector with hysteresis property is proposed in this paper. It provides two different ppms in both different conditions; a smaller ppm for in-lock condition and a… Show more
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