“…By using ZCS, the propagation delay of the comparator and buffer, results in a reverse current causing power loss. A turn‐off time compensation technique for switching control in digital [18, 19] and analogue [20, 21] was developed to remove the reverse current. In the digital approach, the switch turn‐off time is determined by series‐connected delay cells.…”
Section: Issues Related To Dcm Buck Converters For Space‐limited Apmentioning
This study reports a miniaturised discontinuous conduction mode (DCM) variable on-time (VOT) buck converter providing an output of 1.8 V in the input range of 3-12 V to support applications with large wireless coupling. Conventionally, an additional large capacitor has been used as a bootstrap capacitor to drive the high-side switch of buck converters, which prevents minimisation. In this study, a standalone momentary power consumption level shifter is proposed to remove the additional bootstrap capacitor and increase the power conversion efficiency (PCE) in the buck converter. A Zener diode is utilised to reduce the power consumption of the level shifter. In addition, a dead-time-based off-time calibration circuit is proposed to further increase the PCE by reducing the low-side conduction loss. The proposed circuit is fabricated with a TSMC 0.18-µm BCD process, and the core circuit occupies an active area of 0.68 mm 2 with two external components. It provides output currents in the range of 20 µA to 3 mA with a maximum switching frequency of 750 kHz. The maximum efficiency of the converter below 5 mW is 80.2%.
“…By using ZCS, the propagation delay of the comparator and buffer, results in a reverse current causing power loss. A turn‐off time compensation technique for switching control in digital [18, 19] and analogue [20, 21] was developed to remove the reverse current. In the digital approach, the switch turn‐off time is determined by series‐connected delay cells.…”
Section: Issues Related To Dcm Buck Converters For Space‐limited Apmentioning
This study reports a miniaturised discontinuous conduction mode (DCM) variable on-time (VOT) buck converter providing an output of 1.8 V in the input range of 3-12 V to support applications with large wireless coupling. Conventionally, an additional large capacitor has been used as a bootstrap capacitor to drive the high-side switch of buck converters, which prevents minimisation. In this study, a standalone momentary power consumption level shifter is proposed to remove the additional bootstrap capacitor and increase the power conversion efficiency (PCE) in the buck converter. A Zener diode is utilised to reduce the power consumption of the level shifter. In addition, a dead-time-based off-time calibration circuit is proposed to further increase the PCE by reducing the low-side conduction loss. The proposed circuit is fabricated with a TSMC 0.18-µm BCD process, and the core circuit occupies an active area of 0.68 mm 2 with two external components. It provides output currents in the range of 20 µA to 3 mA with a maximum switching frequency of 750 kHz. The maximum efficiency of the converter below 5 mW is 80.2%.
“…On the other side, a DC/DC model is fabricated which works according to two step digital pulse width modulation and capable of detecting zero current. The converter is suitable to be adapted for IoT devices and Digital Power Management (DPWM) model shows least power consumption [7].…”
The voltage fluctuation in electric circuits has been identified as key issue in different electric systems. As the usage of electricity growing in rapid way, there exist higher fluctuations in power flow. To maintain the flow or stability of power in any electric circuit, there are many circuit models are discussed in literature. However, they suffer to maintain the output voltage and not capable of maintaining power stability. To improve the performance in power stabilization, an efficient IC pattern based power factor maximization model (ICPFMM) in this article. The model is focused on improving the power stability with the use of IC (Inductor and Conductor) towards identifying most efficient circuit for the current duty cycle according to the input voltage, voltage in capacitor and output voltage required. The model with boost converter diverts the incoming voltage through number of conductors and inductors. By triggering specific inductor, a specific capacitor gets charged and a particular circuit gets on. The model maintains number of IC (Inductor and Conductor) patterns through which the power flow occurs. According to that, the pattern available, the mofset controls the level of power to be regulated through any circuit. From the pattern, the model computes the Circuits Switching Loss and Circuits Conduction Loss for various circuits. According to the input voltage, the model estimates Circuit Power Stabilization Support (CPSS) according to the voltage available in any capacitor and input voltage. Using the value of CPSS, the model trigger optimal number of circuits to maintain voltage stability. In this approach, more than one circuit has been triggered to maintain output voltage and to get charged. The proposed model not only maintains power stability but also reduces the wastage in voltage which is not utilized. The proposed model improves the performance in voltage stability with less switching loss.
“…A lot of research has been devoted on the design of high efficiency voltage rectifiers, charge pumps, switching DC-DC converters (buck/boost) [12], [13] and low drop out regulators in energy harnessing sensor nodes to minimize the power dissipation of the power delivery blocks. Appropriate zero bias current circuits can also help increase the efficiency of the available power [14].…”
Low power wireless standalone sensors which can operate without any wiring have received significant attention in sensor network applications. These devices harvest environmental energy resources to supply their power and transfer their collected data using wireless RF links. In many instances the power supplied from the environment is far less than the power required by the sensor device. In this case the main solution is to accumulate energy on a storage element and when enough energy is stored, the sensor node is instantaneously activated using an under voltage lockout, UVLO, circuit. During this short time burst, the sensor performs the required acquisition, transmits the results and enters a sleep mode until again enough energy is collected. The quiescent current of the UVLO is the main factor that determines the minimum power level at which the sensor node is still operational. Most wake-up circuits used in conventional devices suffer from a quiescent current of a few hundred nanoamperes. In this work, using a zero bias current MOSFET based approach, a new wake-up circuitry is presented which lowers the quiescent current down to the picoampere range. As a practical application, the effectiveness of the proposed circuit is shown in a soil moisture monitoring sensor setup.
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