Design of a CMOS oscillator with magnetic-field frequency modulation

Weak magnetic field pattern detection by CMOS magnetic latch

“…We then have (1) where and are two coefficients describing the dependencies of on and , respectively. When the two floating gates are cross-connected to the two drains to form a magnetic latch, and the two drains are loaded with respective resistors of the same resistance, , (1) is modified to (2) Equation (2) order to circumvent this problem, a reset mechanism could be imposed, i.e., a transmission gate can be inserted in between the two drains of the latch. When the transmission gate is on, the two drains are short-circuited, and the latch is reset; when the transmission gate is off, the two drains are open-circuited, and the latch is in evaluation phase.…”

“…D UE TO FULL CMOS process-compatibility and good magnetic linearity, the magnetic field-effect transistor (MAGFET) is often combined together with other integrated electronic circuits to detect the strength of the applied magnetic field [1], to realize a magneto-electric function [2], or to recognize a magnetic field pattern [3], [4]. Unfortunately, its magnetic resolution is limited by the intrinsically low magnetic sensitivity, and the bit error rate (BER) is high for weak digital magnetic field detection.…”

A novel 0.7 V high sensitivity complementary differential MAGFET sensor for contactless mechatronic applications

“…MAGFETs [1,2] are MOS magnetic field sensor elements which can be used for numerous applications in contact-less [3] mechatronic sensing (such as rotary encoders in speed/motion control [4][5][6]) and other electronic transducers [7] (such as magnetically controlled oscillator [1,8] and magnetic signal modulator [9]). The basic MAGFET devices published so far are usually split drain NMOSFETs whose current is steered between the two drains with changing magnetic flux density due to a magnetic field perpendicular to the channel of the NMOSFET.…”

Bias-adaptive cross-coupled CMOS MAGFET pair for bipolar magnetic field detection

“…Due to the good linearity and fully-compatibility with standard CMOS process, the MAGFET is often combined together with other integrated electronic circuits to detect the strength of an applied magnetic field [1] [2] [3] or to realize some magnetic field-related functions [4][5] [6]. circuit schematic with p-and n-MAGFETs both selfbiased When an n-channel MAGFET and a p-channel MAGFET are combined in such a way that the drains of the two MAGFETs are cross-connected, a cross-coupled CMOS MAGFET pair (CCMAGFET) is formed [7] [8], the basic circuit schematics of which, with p-channel MAGFET selfbiased and with p -and n-channel MAGFETs both selfbiased, are drawn in Fig.…”

“…2 are in series, we have (1) The I -V characteristics of the three transistors, MI, M2 and M3, can be expressed as P p C n x ( W f ' ) p -M G F ' E T =~n c o x ( w 1 L ) n -M 4 G F E T with Of vgp = Vdd -vg" Based on the above assumptions and the facts that I I = -Ib and I, = I,, we get by solving Eqns. (1) -(4) …”