Design of a 1.8 GHz low-noise amplifier for RF front-end in a 0.8 μm CMOS technology

Inter-modulation linearity investigation of an optimally designed and optimally biased LNA for wireless LAN

“…Due to possible large interference signal tones at the receiver end along with the carrier, linearity is an essential requirement in all RF systems ensuring that the inter-modulation and higher order harmonics should be minimal at the output [4]. LNAs are widely used in telecommunication systems and expected to provide high linearity.…”

“…3) using new engineered underlap devices with inductive source degeneration to provide input impedance of 50 W. The core of the LNA consists of cascode circuit comprising transistors M 1 and M 2 with signal source resistance R s set equal to 50 W (in RF systems a common value for the source and load impedances is 50 W [4]). This cascode configuration is widely-adopted in the RF circuit designs because it provides better isolation between input and output ports and enhanced output resistances [19].…”

“…As a result of proper engineering of SOI-MOS device, it has been found that the drain and source capacitances with respect to the body are significantly reduced [3]. Furthermore, SOI gives inherent suppression of short-channel effect (SCE) as well as an improved lateral isolation compared to bulk technology [3,4].…”

A Fully Integrated 5.2-GHz CMOS Variable Gain LNA for 802.11a WLAN

“…CMOS LNAs open up the possibility of low power consumption and can fully integrate with the baseband chip compared to the bipolar and BiCMOS technologies [3]- [4]. CMOS LNAs must also equal and surpass the low noise figure of these technologies.…”