Design and Simulation of Low Phase Noise Voltage-Controlled Oscillator

Abstract

This paper presents the design and simulation of a low phase noise voltage-controlled oscillator (VCO). The oscillator is based upon the classic LC-tuned negative-resistance topology, with a passive inductor. A fundamental relationship of the channel length of MOS transistors in LC tanks VCO and the phase noise is presented. The proposed VCO in the 0.18µm process is designed which is suitable for system integration in transceiver designs. Using this process, complete pattern VCO is designed in ADS. It operates in the 5.5 GHz frequency range with a 1.8V power supply. The power consumption is 7.592mW. The VCO's phase noise level is-106.4dBc/Hz at 1MHz offset.