Design and Simulation of Improved SOI SiGe Hetero-Junction Bipolar Transistor Architecture with Strain Engineering

Abstract

In order to improve the electrical and frequency characteristics of SiGe heterojunction bipolar transistors (HBTs), a novel structure of SOI SiGe heterojunction bipolar transistor is designed in this work. Compared with traditional SOI SiGe HBT, the proposed device structure has smaller window widths of emitter and collector areas. Under the act of additional uniaxial stress induced by Si 0.85 Ge 0.15 , all the collector region, base region and emitter region are strained, which is beneficial to improve the performance of SiGe HBTs. Employing the SILVACO  TCAD tools, the numerical simulation results show that the maximum current gain β max , the Earley voltage V A are achieved for 1062 and 186 V, respectively, the product of β and V A , i.e., β × V A , is 1.975 × 10 5 V and, the peak cutoff frequency f T is 419 GHz when the Ge component in the base has configured to be a trapezoidal distribution. The proposed SOI SiGe HBT architecture has a 52.9% improvement in cutoff frequency f T compared to the conventional SOI SiGe HBTs.