Design and Simulation of an Optimized DDS

Abstract

In this paper, an improved design of direct digital synthesizer (DDS) based on the traditional frequency synthesizer theory is put forward. To achieve 32-bit DDS design, FPGA StatixⅡseries chip is used. Besides, it has proposed 1/4 look-up table compression, phase jitter injection and other optimization methods. Moreover, error sources of the DDS spectrum spurious output is analyzed. Experimental results show that the improved DDS can generate sine wave with high precision, meanwhile the spurious free dynamic range can achieve 93dB, which improves nearly 10 dB compared with that of unimproved DDS.

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