Design and Simulation for Forward Biased Safe Operating Area of Vertical Insulated Gate Bipolar Transistors with Carrier Lifetimes and Temperatures

Jeong, Hyunjoon; Kim, Tae‐Eun; Ha, Min-Woo

doi:10.5370/kiee.2020.69.3.450

KIEE

2020

DOI: 10.5370/kiee.2020.69.3.450

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Design and Simulation for Forward Biased Safe Operating Area of Vertical Insulated Gate Bipolar Transistors with Carrier Lifetimes and Temperatures

Hyunjoon Jeong¹,

Tae‐Eun Kim²,

Min-Woo Ha³

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Design and Simulation for Forward Biased Safe Operating Area of Vertical Insulated Gate Bipolar Transistors with Carrier Lifetimes and Temperatures

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