Design and modeling of a successive approximation ADC for the electrostatic harvester of vibration energy

Abstract

This paper presents a functional design and modeling of a successive approximation analog-to-digital converter (ADC) and its application in the conditioning circuit of the vibration energy harvester. The paper published on BMAS'09 highlighted the necessity of a smart digital control to calibrate the system, which requires in turn an ultra low power supplied ADC. The harvester and the ADC are designed using a CMOS 0.35µm High Voltage technology and modeled in a mixed VHDL-AMS/ELDO environment. The supply voltage of the ADC is 2.5V. The whole system was simulated using a mixed signal AdvanceMS simulator.

Simulation and Modeling of a 13-bit Successive Approximation Register Analog-to-Digital Converter

“…While the upper plates of the capacitor are switched on/off into the input signal and the lower plates are initially connected to a common voltage V CM which is then switched to one of two reference voltages. Switching the top plate of the capacitor is taken care of by the keys in the sampler, so the DAC consists of a binary capacitor bank and 3-point locks connected to the common level or two reference voltages as presented in [9]. The DAC performs comparator voltage generation (the voltage across the capacitor plates) from the feedback bits from the SAR register through varying the lower plate voltage of the capacitors.…”