Design and Implementation of Signal Generator Based on DDS

Abstract

A signal generator with adjustable frequency, phase and duty cycle is designed in this paper. The design of this signal generator is based on the technology of direct digital synthesis (DDS).The classic structure of DDS is presented and its principles are introduced in detail. The key modules of the design such as phase accumulator and pulse width processing are implemented by verilog HDL language. With suitable FPGA, the designed signal generator and all modules of the design are simulated successfully in Quartus II.

Design and Implementation of a New Architecture of a Real-Time Reconfigurable Digital Modulator (DM) Into QPSK, 8-PSK, and 16-PSK on FPGA

“…However, the impact of this introduced delay on the system is negligible compared to the gain incurred with the reduction in the size of the circuit. In some other QPSK architectures a digitized carrier wave generator was used [6] and [7]. These subcarriers are generated from a Numerically Controlled Oscillator (NCO) to produce the I and Q modulation signals [7].…”