Design and implementation of OFDM Transmitter in WARP v3 board

Navya, Solagudi; Yadav, Praveen Kumar; G, Ramesh

doi:10.1109/icscn.2015.7219871

Cited by 3 publications

(2 citation statements)

References 18 publications

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“…And lastly, the data are received by the receiver part. [22] Results from this Matlab modeling are used as benchmark and verifying purpose for Verilog design and hardware implementation.…”

Section: Mc-cdma Receiver Matlab Modellingmentioning

confidence: 99%

Low power Multicarrier- Code Division Multiple Access Receiver on Field Programmable Gate Array

Hassan¹

2019

IJATCSE

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This paper presents a low power multi-carrier code division multiple access (MC-CDMA) receiver on field-programable gate array (FPGA). Most of the wireless application nowadays such as wireless sensor networks, portable computation and many more require a low power design. Time-division multiple access (TDMA) is used in most wireless receivers are not very efficient since they adopt scheduling technique. The first objective of this paper is to design and verify a low power MC-CDMA receiver and the second objective is to implement the MC-CDMA receiver on FPGA. MC-CDMA act as a processor with the ability to process transmit or receive data simultaneously over a single communication channel. The MC-CDMA design in this paper consists of pipelined FFT and combiner. The primary purpose of pipelined FFT plus combiner module in this research is to execute the instruction on communication (data send and receive) and self-organization. Besides these two modules, there is a memory for temporarily storing the data and an internal clock, among other things. To accomplish these, the designs have been carried out using Verilog coding in Modelsim software, and the design verifications are done through Matlab. The design implementation is via Quartus and on DE2-115 Altera FPGA board. The functionality analyses have been carried out on simulation, and the hardware implementation of the MC-CDMA receiver is tested. Both simulation and hardware execution are successful where the receiver received and displayed the output accordingly. MC-CDMA achieves 39.13mW total power consumption.

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“…And lastly, the data are received by the receiver part. [22] Results from this Matlab modeling are used as benchmark and verifying purpose for Verilog design and hardware implementation.…”

Section: Mc-cdma Receiver Matlab Modellingmentioning

confidence: 99%

Low power Multicarrier- Code Division Multiple Access Receiver on Field Programmable Gate Array

Hassan¹

2019

IJATCSE

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“…Existing SDR platforms can be divided into two different categories according to the implementation type of physical layer including field programmable gate array (FPGA)based SDR platforms and general purpose processor (GPP)based SDR platforms [4]. The wireless open-access research platform (WARP) [5] and the LabVIEW-based USRP-RIO series [6] are two popular FPGA-based SDR platforms. FPGAbased SDR platforms can meet the strict delay constraints of current communication standards owing to their characteristics of deterministic timing and low latency.…”

Section: Introductionmentioning

confidence: 99%

A Design of SDR-based Pseudo-Analog Wireless Video Transmission System

Tang,

Huang

2020

Preprint

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The pseudo-analog wireless video transmission technology can improve the effectiveness, reliability, and robustness of the conventional digital system in video broadcast scenarios. Although some prototypes of IEEE 802.11 series have been developed for researchers to do simulations and experiments, they are usually expensive and provide very limited access to the physical layer. More importantly, these prototypes cannot be used to verify the correctness of the new proposed pseudoanalog wireless video transmission algorithms directly due to limited modulation modes they can support. In this paper, we present a novel design of software radio platform (SDR)-based pseudo-analog wireless video transceiver which is completely transparent and allows users to learn all the implementation details. Firstly, we prove that the analog method can also achieve the optimal performance as the digital method from the perspective of the rate-distortion theory. Then, we describe the two hardware implementation difficulties existed in the designing process including the data format modification and the nonlinear distortion. Next, we introduce the implementation details of the designed transceiver. Finally, we analyze the performance of the designed transceiver. Specifically, the results show that the designed system can work effectively in both simulations and experiments.

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A Design of SDR-Based Pseudo-analog Wireless Video Transmission System

Tang

Huang

2020

Mobile Netw Appl

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Design and implementation of OFDM Transmitter in WARP v3 board

Cited by 3 publications

References 18 publications

Low power Multicarrier- Code Division Multiple Access Receiver on Field Programmable Gate Array

Low power Multicarrier- Code Division Multiple Access Receiver on Field Programmable Gate Array

A Design of SDR-based Pseudo-Analog Wireless Video Transmission System

A Design of SDR-Based Pseudo-analog Wireless Video Transmission System

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