Design and implementation of IEEE1588 time synchronization messages timestamping based on FPGA

Qi, Mingzhu; Wang, Xiaoli; Yang, Zhiqiang

doi:10.1109/drpt.2011.5994146

Cited by 9 publications

(2 citation statements)

References 2 publications

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“…FPGA could provide powerful computing power, and its hardware programmable feature also greatly increases the flexibility of edge nodes. In [12], the timestamps of PTP messages were successfully generated by FPGA. A time synchronization scheme using FPGA and ARM was proposed in [13].…”

Section: Jinst 17 T12006mentioning

confidence: 99%

Design considerations for hardware implementation of nanoseconds time synchronization low-cost system based on precise time protocol

2022

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Precise time synchronization is the key for coordinating every node of the distributed system to complete tasks. The widespread use of Field Programmable Gate Array (FPGA) in distributed nodes has a positive effect on improving time synchronization accuracy. Although the use of FPGA could significantly improve time synchronization accuracy, there is not a universal design guideline. This work has analyzed and summarized three factors that should be considered when building a low-cost clock synchronization system using FPGA: where the timestamp should be generated, the calculation and correction of time offset, and how to handle Precise Time Protocol (PTP) messages. Based on these design considerations, the time synchronization system intellectual property (IP) core was constructed. The synchronization accuracy experiments have been performed on Zynq system-on-chip (SoC) evaluation boards of different architectures. The experimental results demonstrated that the time synchronization system constructed in this article could achieve nanoseconds accuracy.

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Section: Jinst 17 T12006mentioning

confidence: 99%

Design considerations for hardware implementation of nanoseconds time synchronization low-cost system based on precise time protocol

2022

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“…Related works such as [6] have investigated the concept of packet reception and timestamping using the AS6802 [10,27] synchronization algorithm but the implementation or the precision of the achieved clock synchronization are not discussed. Designs for hardware-based PTP timestamping have been presented in [17,20], but they have not been implemented in a real system nor evaluated in terms of their clock synchronization precision.…”

Section: Related Workmentioning

confidence: 99%

Hardware Assisted Clock Synchronization with the IEEE 1588-2008 Precision Time Protocol

Kyriakakis

Sparsø

Schoeberl

2018

Proceedings of the 26th International Conference on Real-Time Networks and Systems

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Emerging technologies such as Fog Computing and Industrial Internetof-Things have identified the IEEE 802.1Q amendment for Time-Sensitive Networking (TSN) as the standard for time-predictable networking. TSN is based on the IEEE 1588-2008 Precision Time Protocol (PTP) to provide a global notion of time over the local area network. Commonly, off-the-shelf systems implement the PTP in software where it has been shown to achieve microsecond accuracy. In the context of Fog Computing, it is hypothesized that future industrial systems will be equipped with FPGAs. Leveraging their inherent flexibility, the required PTP mechanisms can be implemented with minimal hardware usage and can achieve comparable synchronization results without the need for a PTP-capable transceiver. This paper investigates the practical challenges of implementing the PTP and proposes a hardware architecture that combines hardware-based time-stamping with a rate adjustable clock design. The proposed architecture is integrated with the Patmos processor and evaluated on an experimental setup composed of two FPGA boards communicating through a commercial-off-the-shelf switch. The proposed implementation achieves sub-microsecond clock synchronization with a worst-case offset of 138 ns. CCS CONCEPTS • Computer systems organization → Embedded hardware; Embedded software; • Networks → Network protocols;

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Design and FPGA based Implementation of IEEE 1588 Precision Time Protocol for Synchronisation in Distributed IoT Applications

Nagra

Allahi

Pasha

et al. 2021

Australian Journal of Electrical and Electronics Engineering

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Design and implementation of IEEE1588 time synchronization messages timestamping based on FPGA

Cited by 9 publications

References 2 publications

Design considerations for hardware implementation of nanoseconds time synchronization low-cost system based on precise time protocol

Design considerations for hardware implementation of nanoseconds time synchronization low-cost system based on precise time protocol

Hardware Assisted Clock Synchronization with the IEEE 1588-2008 Precision Time Protocol

Design and FPGA based Implementation of IEEE 1588 Precision Time Protocol for Synchronisation in Distributed IoT Applications

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