Design and implementation of embedded computer vision systems based on particle filters

Abstract

a b s t r a c tParticle filtering methods are gradually attaining significant importance in a variety of embedded computer vision applications. For example, in smart camera systems, object tracking is a very important application and particle filter based tracking algorithms have shown promising results with robust tracking performance. However, most particle filters involve vast amount of computational complexity, thereby intensifying the challenges faced in their real-time, embedded implementation. Many of these applications share common characteristics, and the same system design can be reused by identifying and varying key system parameters and varying them appropriately. In this paper, we present a System-on-Chip (SoC) architecture involving both hardware and software components for a class of particle filters. The framework uses parameterization to enable fast and efficient reuse of the architecture with minimal re-design effort for a wide range of particle filtering applications as well as implementation platforms.Using this framework, we explore different design options for implementing three different particle filtering applications on field-programmable gate arrays (FPGAs). The first two applications involve particle filters with one-dimensional state transition models, and are used to demonstrate the key features of the framework. The main focus of this paper is on design methodology for hardware/software implementation of multi-dimensional particle filter application and we explore this in the third application which is a 3D facial pose tracking system for videos. In this multi-dimensional particle filtering application, we extend our proposed architecture with models for hardware/software co-design so that limited hardware resources can be utilized most effectively. Our experiments demonstrate that the framework is easy and intuitive to use, while providing for efficient design and implementation. We present different memory management schemes along with results on trade-offs between area (FPGA resource requirement) and execution speed.

Design Space Exploration of a Particle Filter Using Higher-Order Functions

“…Compared to the architectures presented in [5] and [6], the performance of the architecture presented in this paper is in the same order of magnitude. The throughput is also very similar to performance of the fully parallel particle filter in [8] but requires approximately a factor 6 fewer LUTs.…”

“…Hardware implementations of particle filters using FPGAs for acceleration is extensively covered in [4] and [5] while hardware design methodologies can be found in [6] and [7]. In [6] a generic method is presented to implement different particle filters using a single model. [7] incorporates dataflow principles (data triggered execution) into a particle filtering architecture.…”

Parameterizable FPGA Framework for Particle Filter Based Object Tracking in Video

“…In [5], hardwaresoftware based parametrizable framework is implemented for 1-D and 2-D particle filter applications. Processing elements (PE) based architecture is used to implement noise generator, particle weight memory and weight unit using Xilinx system generator and EDK.…”

“…Real-time object tracking on FPGA using hardware/software approach is also considered in [5][6][7] [8]. In [5], hardwaresoftware based parametrizable framework is implemented for 1-D and 2-D particle filter applications.…”

Weight sorting based scheme and architecture for distributed particle filters

“…Particle filters (PFs) have shown great promise in dealing with nonlinear and/or non-Gaussian problems described by state space models, such as signal processing [1], computer vision [2], communication [3], tracking [4] [5], robotics [6], etc. As a Bayesian method based on Monte Carlo simulations, they focus on statistical and simulated state estimations rather than analytical solutions which are only possible in much constrained conditions, and thus outperforms traditional methods, e.g.…”