2013 International Conference on Control Communication and Computing (ICCC) 2013
DOI: 10.1109/iccc.2013.6731621
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Design and implementation of digital Costas loop and Bit synchronizer in FPGA for BPSK demodulation

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Cited by 14 publications
(5 citation statements)
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“…Subsequently, it enters the Costas loop to obtain the coherent carrier signal oi (t). The filtered 2PSK input signal can written as [46],…”
Section: Sending Module Designmentioning
confidence: 99%
“…Subsequently, it enters the Costas loop to obtain the coherent carrier signal oi (t). The filtered 2PSK input signal can written as [46],…”
Section: Sending Module Designmentioning
confidence: 99%
“…Reported solutions to recover constellation points for PSK and QAM waveforms are mainly based on PLL schemes, such as a Costas Loop [16] and a Square Loop [17], or through the maximum likelihood (ML) [18] method. All of which are using an equalization for undesirable channel effects in the signal preprocessing step (cf.…”
Section: Related Workmentioning
confidence: 99%
“…The squaring recovery block [4] corrects any time error by interpolating the s C [n] signal in order to choose the best sample. The last block implements a digital Costas loop [5] that estimates and corrects the phase error and performs the bit decision.…”
Section: Demodulator Modelmentioning
confidence: 99%