2005
DOI: 10.1007/11596981_165
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Design and Implementation of Crypto Co-processor and Its Application to Security Systems

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“…The prominent of these efforts can be classified broadly as Hardware or Software Parallel Cryptographic Implementations involving several technical approaches beneath them as shown in Fig 1. Parallelization with RISC Processors by HoWon Kim et al, introduced a special-purpose microprocessor known as crypto processor. It had a 32-bit RISC processor block and a coprocessor block dedicated to SEED and TDES [8]. Pionteck et al, in their work presented a hardware design of AES with reconfigurable encryption/decryption engines which supports all key lengths [9].…”
Section: Related Workmentioning
confidence: 99%
“…The prominent of these efforts can be classified broadly as Hardware or Software Parallel Cryptographic Implementations involving several technical approaches beneath them as shown in Fig 1. Parallelization with RISC Processors by HoWon Kim et al, introduced a special-purpose microprocessor known as crypto processor. It had a 32-bit RISC processor block and a coprocessor block dedicated to SEED and TDES [8]. Pionteck et al, in their work presented a hardware design of AES with reconfigurable encryption/decryption engines which supports all key lengths [9].…”
Section: Related Workmentioning
confidence: 99%