Design and implementation in USRP of a preamble-based synchronizer for OFDM systems

Herrera-Bustamante, José; Rodríguez-Ludeña, Vanessa; Correa-Mena, A. G.; Barragán-Guerrero, Diego

doi:10.1109/andescon50619.2020.9272183

Cited by 2 publications

(2 citation statements)

References 9 publications

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“…Several synchronization algorithms have been examined and deployed using a software-defined radio (SDR) that utilizes the Universal Software Radio Peripheral (USRP). The evaluation is based on the correlation of the symbols in the preamble [17]. In recent times, scholars have conducted investigations into various approaches aimed at improving the utilization of LDACS spectrum through filtering and windowing technology.…”

Section: ░ 2 Literature Reviewmentioning

confidence: 99%

Design and Implementation of a Two-Frequency Power Amplifier without Interference for Wireless Communication

Saad Ahmed,

Jasim Hadi Al-Chaabawi,

Atiyah Itwayya

2023

IJEER

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In this research paper, we will delve into a type of circuit known as a power amplifier. This circuit is designed to operate at two frequencies, allowing it to perform tasks at each frequency. The main goals of the design are to separate signals and ensure proper operation of the circuit in different modes. One notable feature of this power amplifier is its ability to work without any distortion, especially when both frequencies are used simultaneously. Achieving this has been made possible by combining a method that ensures signal termination with a strategy that enables their separation. To evaluate its performance, we conducted computer simulations as tests using both large signals. The findings indicate a 10.2 decibel increase in amplification, with an output power of 41.2 decibels measured in milliwatts (dBm) and an overall power efficiency of 40.2% at a frequency of 1.8 gigahertz. Furthermore, our research reveals that the suppression of signals for the 1.8 GHz band is reduced by 49 decibels compared to the original signal, while for the 2.6 GHz band, almost all traces of the second harmonic signal are completely eliminated. In addition, we propose a circuit that mitigates mixing outcomes and enhances linearity performance. The EDA software, Path Wave EM Design, is used for simulation purposes.

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Section: ░ 2 Literature Reviewmentioning

confidence: 99%

Design and Implementation of a Two-Frequency Power Amplifier without Interference for Wireless Communication

Saad Ahmed,

Jasim Hadi Al-Chaabawi,

Atiyah Itwayya

2023

IJEER

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“…The algorithm has large settling time and gate count. In [5], a timing synchronization algorithm that is based on crosscorrelation of the received signal with a training sequence has been designed whose settling time is quite long. A PSK based symbol synchronizer based on a reinforcement learning method called Q-learning has been proposed in [6].…”

Section: Introductionmentioning

confidence: 99%

An Ultra Fast Settling and Low Area Bit Synchronizer Architecture

Ghosh,

Dhar

2023

Preprint

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<p>The research is focussed on designing a bit synchronizer for wireless sensor node (WSN) applications and specifically Medical Implant Communications Service (MICS) band WSNs. The basic philosophy is that on receiving a 0-1 initial bit transition from the transmitter, the bit synchronizer is activated and it generates a strobe signal at bit time intervals from an initial latency. Two methods for latency calculation has been described. One is off-chip and another is on-chip. The bit synchronizer has ultra fast settling capability, ultra low power consumption and low silicon area. These requirements are a must for bit synchronizers in WSNs. A non-ideal model of a BFSK receiver has been designed in MATLAB and the bit synchronizer operation has been tested. Bit error ratio less than 10<sup>-3 </sup>has been obtained (WSNs have less stringent error ratios).</p>

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Design and implementation in USRP of a preamble-based synchronizer for OFDM systems

Cited by 2 publications

References 9 publications

Design and Implementation of a Two-Frequency Power Amplifier without Interference for Wireless Communication

Design and Implementation of a Two-Frequency Power Amplifier without Interference for Wireless Communication

An Ultra Fast Settling and Low Area Bit Synchronizer Architecture

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