Design and Fabrication of Wideband Low Phase Noise Frequency Synthesizer Using YTO

Abstract

The low phase noise and wideband frequency synthesizer has been designed by using YTO. Offset PLL structure is used for reducing a division ratio of feedback loop. The phase noise modeling is applied to optimize loop filter of PLL and YTO module. And DDS is used as reference signal of frequency synthesizer for fine resolution. The fabricated wideband frequency synthesizer has the output frequency of 3.2 GHz to 6.8 GHz, phase noise of -107 dBc/Hz at 10 kHz offset from the carrier and frequency resolution of 1 Hz. The measured phase noise is well agreed with the simulated one. . Offset PLL 방식은 혼합기를 이용하여 궤환되는 주파수를 낮춘 후 분주하기 때문에, 분주비를 낮출 수 있어 위상 잡음을 개선할 수 있다 [2] . 광대역 PLL 을 설계하기 위해서 샘플링 믹서를 주로 사용한다. 이는 고조파 발생기와 혼합기가 결합된 형태로 낮은 주파수의 입력 신호가 고조파 발생기를 통해 N차의 ⓒ