Design and development of a capacitance‐based wireless pressure transmitter

Sinha, Sujata; Kachhap, Rupam V.; Mandal, Nirupama

doi:10.1049/iet-smt.2017.0545

Cited by 4 publications

(3 citation statements)

References 14 publications

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“…The connection between the transmitter and the non-inverting terminal of the comparator is shown in Figure 8. An industrial standard transmitter generates an output of 4 to 20 mA current signal (Sunita Sinha [27]). A resistor is connected in series with the 24 V DC power supply to convert the 4 to 20 mA current signal into a 1 V to 5 V voltage signal.…”

Section: Pressure Process Stationmentioning

confidence: 99%

“…A capacitance probe sensor is used to sense the water l into 4 to 20 mA current signal by a level transmitter. The co mitter and the non-inverting terminal of the comparator is sh trial standard transmitter generates an output of 4 to 20 mA [27]). A resistor is connected in series with the 24 V DC pow 20 mA current signal into a 1 V to 5 V voltage signal.…”

Section: Pressure Process Stationmentioning

confidence: 99%

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Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA

Dhanabalan¹,

Selvi²,

Mahdal

2022

Sensors

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A programmable logic controller (PLC) executes a ladder diagram (LD) using input and output modules. An LD also has PID controller function blocks. It contains as many PID function blocks as the number of process parameters to be controlled. Adding more process parameters slows down PLC scan time. Process parameters are measured as analog signals. The analog input module in the PLC converts these analog signals into digital signals and forwards them to the PID controller as inputs. In this research work, a field-programmable gate array (FPGA)-based multiple PID controller is proposed to retain PLC scan time at a lower value. Concurrent execution of multiple PID controllers was assured by assigning separate FPGA hardware resources for every PID controller. Digital input to the PID controller is routed by the novel idea of analog to digital conversion (ADC), performed using a digital to analog converter (DAC), comparator, and FPGA. ADC combined with dedicated PID controller logic in an FPGA for every closed-loop control system confirms concurrent execution of multiple PID controllers. The time required to execute two closed-loop controls was identified as 18.96000004 ms. This design can be used either with or without a PLC.

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Section: Pressure Process Stationmentioning

confidence: 99%

Section: Pressure Process Stationmentioning

confidence: 99%

Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA

Dhanabalan¹,

Selvi²,

Mahdal

2022

Sensors

View full text Add to dashboard Cite

show abstract

“…One method for capacitance measurement uses the overlappedarea variation of the conducted parallel plates to reveal the change in capacitance. Another [2] utilizes the distance variation between conducted parallel plates to illustrate capacitances. The proposed target in this study is the application of plantar pressure monitoring.…”

Section: Introductionmentioning

confidence: 99%

Detection System for Capacitive Plantar Pressure Monitoring

2020

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This study presents a detection system with a prototype acquisition module and display interface for capacitive plantar pressure monitoring. The detection system mainly focuses on a systemlevel design (not a system on chip). The prototype acquisition module consists of commercial ICs and self-designed chips: A capacitance-to-voltage converter (CVC) and a 10-bit fully differential successive approximation register analog-to-digital converter are fabricated by the TSMC 0.18 µm 1P6M 3.3 V process. The feature of the CVC is selectable for the detection points from 1 to 64, which is controlled by the digital codes of a field-programmable gate array (FPGA). It also has the embedded functions of crosstalk attenuation (CA) for cross-type capacitive sensors and a self-separated input signal for capacitive plantar pressure monitoring. The CA can effectively reduce parasitic capacitances and influences of the temperature and relative humidity of the environment: An M×N array only requires M + N tracks of I/O ports to reduce detected complexity. The measured results shown on the display interfaces reveal the positions and amplitudes (voltage swings) of the corresponding capacitances. The conversion time for one capacitance is 0.4 ms, and the maximum conversion time for 64 capacitances is 25.6 ms. A handmade cross-type capacitive array and a cross-type capacitive plantar pressure sensor are used to demonstrate the detection system.

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Design and Development of Bending Sensor-Based Pressure Transducer

Lata

Mandal

2021

Algorithms for Intelligent Systems

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Design and development of a capacitance‐based wireless pressure transmitter

Cited by 4 publications

References 14 publications

Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA

Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA

Detection System for Capacitive Plantar Pressure Monitoring

Design and Development of Bending Sensor-Based Pressure Transducer

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