Design and Comparative analysis of a Two-Stage Ultra-Low-Power Subthreshold Operational Amplifier in 180nm, 90nm, and 45nm technology

Abstract

In this paper, a two-stage ultra-low-power operational amplifier is designed, and a comparative analysis of the proposed subthreshold complementary amplifier is presented between 180nm, 90nm, and 45nm CMOS technology. The proposed operational amplifier is compared across several different parameters to determine the optimal design. It achieves a maximum gain of around 75 dB and a phase margin of 76°, dissipating just 140nW with a supply voltage of 0.5 V which is well suited for biomedical applications that require low power and high gain. The proposed operational amplifier has been designed using a SPICE-based circuit simulator.

Double-Differential Amplifier for sEMG Measurement by Means of a Current-Mode Approach

“…It is worth noting that although the proofof-concept implementation was built using off-the-shelve commercial components, it has achieved performance parameters within the state-of-the-art, except, of course, for the power consumption, since carefully designed ASICs can achieve more than an order of magnitude better performance. Although optimizing power consumption falls outside of the scope of this work, the low active-part count compared with other DD front-ends and the power reduction achieved by modifying component selection are preliminary that this feature could be improved in a specialized implementation including ultra-low-power active-block realizations [37], [38].…”

Design of Two stage OTA with Optimised Compensation Capacitance

“…The design can work at supply voltage and bias currents because the transistor in the subthreshold region operates below the threshold voltage. [8] provides the equation for the drain current (ID) in the switching frequency zone.…”

“…For this reason, opamps with multiple stages are not frequently employed. Harmonic provides lower can be used to provide the answer to this problem [8].…”