Design and characterization of depleted monolithic active pixel sensors within the RD50 collaboration

Sieberer, Patrick; Irmler, C.; Steininger, Helmut; Bergauer, T.

doi:10.1016/j.nima.2022.167020

Cited by 3 publications

(2 citation statements)

References 9 publications

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“…Using a 640 MHz LVDS line for readout, a pixel hit rate of about 16 MHz over the full matrix can be handled. A detailed description of the transmission unit including timing has been published in [8].…”

Section: Pixel Matrix Configuration and Readoutmentioning

confidence: 99%

RD50-MPW3: a fully monolithic digital CMOS sensor for future tracking detectors

et al. 2023

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The CERN-RD50 CMOS working group develops the RD50-MPW series of monolithic high-voltage CMOS pixel sensors for potential use in future high luminosity experiments such as the HL-LHC and FCC-hh. In this contribution, the design of the latest prototype in this series, RD50-MPW3, is presented. An overview of its pixel matrix and digital readout periphery is given, with discussion of the new structures implemented in the chip and the problems they aim to solve. The main analogue and digital features of the sensor are already tested and initial laboratory characterisation of the chip is presented.

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Section: Pixel Matrix Configuration and Readoutmentioning

confidence: 99%

RD50-MPW3: a fully monolithic digital CMOS sensor for future tracking detectors

et al. 2023

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“…The starting point of this work is the RD50-MPW3 [18], which is a two-column-based matrix of 64 × 64 pixels. Each pixel consists of a 62 µm × 62 µm size sensing diode that integrates both the analog and digital readout electronics in an area of less than 44 µm × 44 µm (Figure 3).…”

Section: Rd50-mpw3 Solutionmentioning

confidence: 99%

Optimizing Time Resolution Electronics for DMAPs

López-Morillo,

Luján-Martínez,

Hinojo-Montero

et al. 2023

Sensors

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Depleted Monolithic Active Pixel Sensors (DMAPSs) are foreseen as an interesting choice for future high-energy physics experiments, mainly because of the reduced fabrication costs. However, they generally offer limited time resolution due to the stringent requirements of area and power consumption imposed by the targeted spatial resolution. This work describes a methodology to optimize the design of time-to-digital converter (TDC)-based timing electronics that takes advantage of the asymmetrical shape of the pulse at the output of the analog front-end (AFE). Following that methodology, a power and area efficient implementation fully compatible with the RD50-MPW3 solution is proposed. Simulation results show that the proposed solution offers a time resolution of 2.08 ns for a range of energies from 1000 e− to 20,000 e−, with minimum area and zero quiescent in-pixel power consumption.

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Design and Performance of HV CMOS Sensors for Future Colliders by the RD50 Collaboration

Sonneveld

2024

Proceedings of the 31st International Workshop on Vertex Detectors (VERTEX2022)

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Design and characterization of depleted monolithic active pixel sensors within the RD50 collaboration

Cited by 3 publications

References 9 publications

RD50-MPW3: a fully monolithic digital CMOS sensor for future tracking detectors

RD50-MPW3: a fully monolithic digital CMOS sensor for future tracking detectors

Optimizing Time Resolution Electronics for DMAPs

Design and Performance of HV CMOS Sensors for Future Colliders by the RD50 Collaboration

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