Design and Characterization of a Burst Mode 20 Mfps Low Noise CMOS Image Sensor

Abstract

This paper presents a novel ultra-high speed, high conversion-gain, low noise CMOS image sensor (CIS) based on charge-sweep transfer gates implemented in a standard 180 nm CIS process. Through the optimization of the photodiode geometry and the utilization of charge-sweep transfer gates, the proposed pixels achieve a charge transfer time of less than 10 ns without requiring any process modifications. Moreover, the gate structure significantly reduces the floating diffusion capacitance, resulting in an increased conversion gain of 183 µV/e−. This advancement enables the image sensor to achieve the lowest reported noise of 5.1 e− rms. To demonstrate the effectiveness of both optimizations, a proof-of-concept CMOS image sensor is designed, taped-out and characterized.

A Review of Optical Sensors in CMOS

“…The CDS process mixes and interleaves two sets of integration and readout modes because two samples {V g2,1 , V g2,2 } of V g2 are required. All the pixels of a line share the same output column, originating so-called fixed-pattern noise (FPN), which impossible to reduce with filtering techniques [94][95][96][97][98].…”