Design and analysis of two novel 2-out-of-3 voters

Abstract

In fail-safe computer systems, such as railway signaling systems, the outputs directly drive some vital units. Once they happen in error, there will be some injuries, even losses or damages. In order to improve the reliability and safety of fail-safe computer systems, in this paper, we innovatively design and implement two kinds of 2-out-of-3 voters: the dynamic voter and the static voter. The former achieves the voting function mainly with pulse demodulation circuit, and the latter realizes it mainly with four solid state relays. Furthermore, we analyze their performances with Markov model. The dynamic voter is hazard-free, and the reliability of the dynamic voter is 376 years. For so few components, the static voter is of amazing reliability with 875 years. In addition, with the help of loopback detection, it satisfies safety integrity level 4. At last, we analyze and discuss some applications of the two voters in railway signaling systems, and make suggestions on application choice.

Strengthened 32‐bit AES implementation: Architectural error correction configuration with a new voting scheme

“…Thus, a regular counter is employed and loaded with an arbitrary value n that stops the circuit’s normal operation once in each n clock cycle and stimulates the recovery mode in which state restoration is performed. Since the CMOS devices are active devices, some hazards on replicas outputs may be generated even if all the inputs are stable and hazard‐free [37]. Hazards can also be generated due to unequal propagation delay paths originated from the same inputs [38].…”