Design and Analysis of Broadband Dual-Gate Balanced Low-Noise Amplifiers

Deal, W.R.; Biedenbender, M.; Liu, Po-Hsin; Uyeda, J.; Siddiqui, M.; Lai, R.

doi:10.1109/jssc.2007.904316

Cited by 51 publications

(19 citation statements)

References 7 publications

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“…There have been a number of efforts to design LNA [9][10][11] for radio astronomy applications, which attempted to address the good noise figure along with wideband characteristics, good linearity, high gain and good input power matching. Several wide-band LNA topologies have been implemented, namely:…”

Section: Lna Topologiesmentioning

confidence: 99%

“…As mentioned before, there have been several attempts to design broadband LNAs, based on the above architecture [9][10][11]. However, the currently reported LNAs employed at least few off-chip components which limits the receiver miniaturisation as well as impedes the improvement of the system performance and power consumption.…”

Section: Lna Topologiesmentioning

confidence: 99%

“…The parallel combination of these networks results in a broadband input matching. As widely discussed in literature [10][11][12][13], a very small source inductance (Ls) is needed to achieve lowest possible NF. However, due to technological restrictions to achieve inductance of less than 1nH, two 1nH inductors were connected in parallel to further reduce L s and hence reduce NF.…”

Section: Lna Topologiesmentioning

confidence: 99%

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A 0.68-dB NF, 1.1GHz-band low noise amplifier for square kilometer array application

Shah

Singh

et al. 2008

SPIE Proceedings

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This paper presents the design and implementation of a fully on-chip wideband low noise amplifier (LNA) using 0.25-micron Silicon-on-Sapphire (SOS) technology for the next-generation Square Kilometre Array (SKA) radio telescope application. Ultra low noise and wideband operation are the principle design challenges in LNA for SKA application. The proposed LNA design employs cascaded inductive degeneration architecture and achieves broadband matching by using on-chip high quality factor (Q) SOS inductors inter-stage/intermediate LC matching circuit. Use of high Q inductors results in low noise input matching circuit that enables the LNA to achieve the required minimum noise figure (NF). The proposed LNA is a complete on-chip solution that achieves a NF from 0.57dB to 0.68dB over 1.1GHZ-band with a minimum gain of 15.3dB. This design consumes only 40.78mW of power from a 2.5-V power supply.

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Section: Lna Topologiesmentioning

confidence: 99%

Section: Lna Topologiesmentioning

confidence: 99%

Section: Lna Topologiesmentioning

confidence: 99%

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A 0.68-dB NF, 1.1GHz-band low noise amplifier for square kilometer array application

Shah

Singh

et al. 2008

SPIE Proceedings

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“…The noise performance of the LNA designed by Deal et al is excellent. It operates at 4-9 GHz and demonstrated with 1.75 dB Noise figure, they also designed a 9-20 GHz LNA which gives 2.75 dB NF [10]. In ref [11], both LNAs a shunt peaked load, resistively loaded design achieve an acceptable S 11 of 10 dB across the ultra wideband.…”

Section: Introductionmentioning

confidence: 99%

Modified Design and Analysis of a CMOS LNA for Wireless Sensor Network Applications

Sasilatha

Raja²

2009

Wireless Pers Commun

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This paper focused on the modified design and implementations of Low noise amplifiers targeted for wireless sensor network applications. Key issues in wireless sensor network receivers are discussed and the existing circuit level implementations of Low noise amplifiers are compared. Emphasis was placed on observing device reliability constraints at low power to maximize the life time of the wireless sensor nodes. The proposed Low noise amplifier can operate at 2.4 GHz and dissipates a power of 2 mW from a 1 V supply. It gives <−15 dB S 11 , 3.9 dB Noise figure at 20 dB gain and IIP 3 of −2.88 dBm. The noise performance at input, output and the frequency response is presented.

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“…In addition, the LNA needs to consume low power, owing to a huge number of receivers required in the SKA [1,2]. There have been several attempts to design broadband LNAs [3][4][5]. However, the currently reported LNAs employ at least a few off-chip components, which limits receiver miniaturisation and also impedes improvement of system performance and power consumption.…”

mentioning

confidence: 99%