Design and Analysis of a 140-GHz T/R Front-End Module in 22-nm FD-SOI CMOS

Tang, Xinyan; Nguyen, Johan; Mangraviti, Giovanni; Zong, Zhiwei; Wambacq, Piet

doi:10.1109/jssc.2021.3139359

Cited by 19 publications

(9 citation statements)

References 44 publications

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“…10b. The BIST line is located The outlined structure illustrates the capacitive coupler used at the input to each element similar to that used in [21].…”

Section: B Capacitive Couplingmentioning

confidence: 99%

“…There is an on-going vivid debate about the standardization and commercialization of new high-volume millimeter-wave applications up to and above 100 GHz [6], [7]. Different research groups have already demonstrated the technical feasibility of radar and communications circuits at 60 GHz [8]- [13], 120 GHz [8], [14]- [16], and 140 GHz [17]- [21].…”

Section: Introductionmentioning

confidence: 99%

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Built-In Self-Test of Millimeter-Wave Integrated Front-End Circuits: How Far Have We Come?

Wenger,

Meinerzhagen,

Issakov

2024

IEEE Access

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With automotive radar and 5G/6G communications, mass-market applications for millimeterwave circuits in silicon technologies have been identified or established in recent years. For high-volume, millimeter-wave integrated circuits, operating roughly between 30 GHz and 300 GHz, testability is a major concern, both from an overall cost as well as a quality assurance perspective. A solution for cost effective, low-overhead test of millimeter-wave integrated circuits is the integration of built-in self-test (BIST) features into the high-frequency front-end. Because BIST is an emerging topic in high-frequency circuit design, the field is still very fragmented. A plethora of different system concepts as well as building blocks have been proposed in recent years. This paper tries to provide a comprehensive overview of the state of the art in millimeter-wave BIST in an attempt to drive the field towards identification of standardized self-test solutions.INDEX TERMS Built-in self-test, CMOS, millimeter-wave transceivers, SiGe, silicon.

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“…10b. The BIST line is located The outlined structure illustrates the capacitive coupler used at the input to each element similar to that used in [21].…”

Section: B Capacitive Couplingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Built-In Self-Test of Millimeter-Wave Integrated Front-End Circuits: How Far Have We Come?

Wenger,

Meinerzhagen,

Issakov

2024

IEEE Access

View full text Add to dashboard Cite

show abstract

“…Due to the single-ended structure, the input impedance of the first stage is smaller, as it is theoretically equal to 1/4 of the differential counterpart if their total sizes are the same. In fact, the size of the transistor in an LNA is typically much smaller than the one used in power amplifier (PA) [23], which leads to a relatively large input impedance. A single-ended structure can therefore reduce the input transformation ratio, which brings a lower insertion loss [24], [25] and consequently a better NF.…”

Section: A Low-noise Amplifiermentioning

confidence: 99%

“…The loss in the RX mode from the T/R SW can increase NF as discussed, while the loss in the TX mode can degrade the TX efficiency to 1/L i times of the original one. Despite its importance, conventionally, the T/R SW is designed separately from the TX and RX with 50matching interface for convenience [23]. However, it requires additional matching networks, leading to extra losses, on top of the 1.3-1.6-dB insertion loss of the SW itself [34], [35], [36].…”

Section: Tx/rx Switchmentioning

confidence: 99%

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A 23-GHz TX/LNA Front-End Module for Inter-Satellite Links With 27.8% Peak Efficiency in the TX Path and 3.1-dB NF in the RX Path

Ding,

Vidojkovic,

Milosevic

et al. 2024

IEEE J. Solid-State Circuits

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This article presents a 23-GHz transmitter/lownoise amplifier (TX/LNA) front-end module (FEM) in 130-nm SiGe BiCMOS for inter-satellite links (ISLs) in the system of orbiting low-frequency antenna array (OLFAR). The FEM consists of an LNA, a power amplifier (PA), a variable-gain amplifier (VGA), a phase shifter (PS), and a TX/receiver switch (T/R SW). By applying the combination of different techniques: 1) multi-function block design strategy; 2) current reuse and g m boosting implemented by a triple-coil transformer in the LNA; 3) dual-LC-tank-based integrated T/R SW, a compact FEM is achieved, simultaneously with an advanced-state-of-theart efficiency in the TX path and a competitive noise figure (NF) in the receiver (RX) path. In the TX path, it demonstrates a measured saturated output power (P sat ) of 16.8 dBm, a peak TX efficiency of 27.8%, and a 34.1-dB gain. It supports 900-Mbps 64-QAM signals with 4.9% error vector magnitude (EVM) and −27.5-dBc adjacent channel power ratio (ACPR), at 9.0-dBm output power (P out ) with 8.8% TX efficiency. In the RX path, an NF of 3.1 dB and an input 1-dB compression point (IP 1 dB ) of −19.4 dBm are achieved with a 19.3-dB gain and a 10-mW power consumption. The core chip area is 1.11 × 0.48 mm.

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Multi-switch-controlled multi-mode TRFE with a high-linearity ATRSW for 2.4-GHz ISM applications

Zheng,

Jiang,

Xie

et al. 2024

Microelectronics Journal

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Design and Analysis of a 140-GHz T/R Front-End Module in 22-nm FD-SOI CMOS

Cited by 19 publications

References 44 publications

Built-In Self-Test of Millimeter-Wave Integrated Front-End Circuits: How Far Have We Come?

Built-In Self-Test of Millimeter-Wave Integrated Front-End Circuits: How Far Have We Come?

A 23-GHz TX/LNA Front-End Module for Inter-Satellite Links With 27.8% Peak Efficiency in the TX Path and 3.1-dB NF in the RX Path

Multi-switch-controlled multi-mode TRFE with a high-linearity ATRSW for 2.4-GHz ISM applications

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