Design and Analysis of a Symmetrical Low-κ Source-Side Spacer Multi-gate Nanowire Device

Gowthami, Y.; Balaji, B.; Rao, K. Sambasiva

doi:10.1007/s11664-023-10217-z

Cited by 11 publications

(9 citation statements)

References 22 publications

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“…In particular, TFET demonstrates diverse voltage shifts during its interaction with different biological molecules that have distinct K values. In this study, the changes in biomolecule (such as K=1,K=3,K=7) biomolecule affect the potential across the TFET (28,29). The variation of dielectric constant of the immobilized biomolecule significantly affects the local electric field in nano cavity of the TFET.…”

Section: Resultsmentioning

confidence: 95%

Design and Performance Analysis of Gate Overlap Dual Material Tunnel Field Effect Transistor

Buttol,

Balaji

2024

IJE

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This study introduces a biosensor employing a dielectric-modulated dual material gate tunnel field effect transistor (DM-DMG TFET) in 10 nanometer technology. To detect diverse bio molecules, the biosensor incorporates a nano gap cavity formed through gate overlap on the drain side. The variation in ambipolar current serves as the sensing parameter, influenced by altering the dielectric constants of immobilized bio molecules within the nano cavity. In this paper, the simulation results of biosensor employing a dielectric-modulated dual material gate tunnel field effect transistor with different dielectric constants imposed in nano cavity. A comprehensive examination of the biosensor's performance is conducted, exploring various positions and filling factors of bio molecules within the nano cavity region. This analysis involves a thorough investigation into the device's performance, considering a range of parameters such as drain current, electric field distribution, variations in surface potential, configurations of energy bands, behaviors of carrier concentration, and the Ion/Ioff ratio. The simulations are done using the Silvaco TCAD Atlas tool.

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Section: Resultsmentioning

confidence: 95%

Design and Performance Analysis of Gate Overlap Dual Material Tunnel Field Effect Transistor

Buttol,

Balaji

2024

IJE

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“…The drain current (Id) versus gate-to-source voltage (Vgs) characteristics for a proposed device, investigating the behavior of this proposed transistor under different operating conditions (25). The dual metal gate overlap on the drain (DMG-OD) side can help to reduce the tunneling barrier and improve electron injection from the source to the channel (26).…”

Section: Resultsmentioning

confidence: 99%

Investigation and Analysis of Dual Metal Gate Overlap on Drain Side Tunneling Field Effect Transistor with Spacer in 10nm Node

Howldar,

Balaji,

Srinivasa Rao

2024

IJE

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“…Such as SiO2, Si3N4, Al2O3, and Si3N4/Al2O3, single gate with a passivation layer (SGP) [29], DGP, passivated double gate with triple tooth (DGP-TT), the characteristics such as drain current (ID), Trans conductance (gm), Ioff, cut off frequency (fT), obtained from Si3N4/Al2O3 passivated dual gate GaN HEMT with triple tooth are illustrated. it is observed that DGP-TT N=3 HEMT exhibited optimized results of 𝐼 𝐷 = 4.9 A/mm, the leakage current of 9.5E-11(A), transconductance of 2.7 S/mm, cutoff frequency 560 GHz, drain conductance 0.657 (S/mm), on resistance 0.6 (ohm mm) [30]. The gate to source capacitance is product of trans conductance and cut off frequency represented in (5) where gm is trans conductance [31].…”

Section: Int J Elec and Comp Engmentioning

confidence: 96%

Design and performance analysis of front and back Pi 6 nm gate with high K dielectric passivated high electron mobility transistor

Gowthami

Balaji

Rao

2023

IJECE

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Advanced high electron mobility transistor (HEMT) with dual front gate, back gate with silicon nitride/aluminum oxide (Si3N4/Al2O3) as passivation layer, has been designed. The dependency on DC characteristics and radio frequency characteristics due to GaN cap layers, multi gate (FG and BG), and high K dielectric material is established. Further compared single gate (SG) passivated HEMT, double gate (DG) passivated HEMT, double gate triple (DGT) tooth passivated HEMT, high K dielectric front Pi gate (FG) and back Pi gate (BG) HEMT. It is observed that there is an increased drain current (Ion) of 5.92 (A/mm), low leakage current (Ioff) 5.54E-13 (A) of transconductance (Gm) of 3.71 (S/mm), drain conductance (Gd) of 1.769 (S/mm), Cutoff frequency (fT) of 743 GHz maximum oscillation frequency (Fmax) 765 GHz, minimum threshold voltage (V<sub>th</sub>) of -4.5 V, on resistance (Ron) of 0.40 (Ohms) at V<sub>gs</sub>=0 V. These outstanding characteristics and transistor structure of proposed HEMT and materials involved to apply for upcoming generation high-speed GHz frequency applications.

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Design and Analysis of a Symmetrical Low-κ Source-Side Spacer Multi-gate Nanowire Device

Cited by 11 publications

References 22 publications

Design and Performance Analysis of Gate Overlap Dual Material Tunnel Field Effect Transistor

Design and Performance Analysis of Gate Overlap Dual Material Tunnel Field Effect Transistor

Investigation and Analysis of Dual Metal Gate Overlap on Drain Side Tunneling Field Effect Transistor with Spacer in 10nm Node

Design and performance analysis of front and back Pi 6 nm gate with high K dielectric passivated high electron mobility transistor

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