Design, Analysis, Fabrication &amp; Testing of SiC Device based High Frequency Synchronous DC-DC Converters

Kar, Abhishek; Manna, Shalini; Banerjee, Gourab; Sengupta, Mainak

doi:10.1109/npec52100.2021.9672477

Cited by 9 publications

(1 citation statement)

References 4 publications

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“…Figure 13 shows the recent study results on highefficiency DC-DC conversion after 2015. The studies in this paper showed a very high efficiency [23,25] , where other investigations were performed based on a hard-switching conventional DC-DC converter [38,39] , and four other studies were conducted based on the partial boost topology [23,25,40,41] . The methodology of loss estimation in the literature, except our articles, was based on the difference between input and output power, and the accuracy was not examined in detailed.…”

Section: Recent Studies On Extremely High-efficiency Dc-dc Conversionmentioning

confidence: 90%

Over 99.7% Efficiency at 100kW DC-DC Power Conversion using a 3.3kV SiC Device and Discussion on Device <i>dv/dt</i> Estimation

Kawamura,

Tsuruta,

Obara

2024

IEEJ Journal IA

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This paper is a re-evaluation of a completed project (High Efficiency Demonstration Grant Using High Voltage SiC Device) from the perspective of accurate efficiency measurement; additionally, this paper discusses on device dv/dt estimation. A topology called the high-efficiency energy conversion system (HEECS), which is one variety of partial boost circuit topologies, is introduced to achieve efficiency over 99.5%. The topology exhibits a very high efficiency for applications in which the output voltage variation is within a certain ratio of the rated output voltage. This paper summarizes the basic features of the topology and theoretically derives the principle of high-efficiency realization. The high efficiency is measured by the back-to-back(BTB) connection of two converters, and the efficiency and accuracy on this method are theoretically derived and confirmed using the measured data of 3.3 kV output voltage at 100 kW output. The theoretical estimation of dv/dt for a 3.3 kV SiC device to reduce dual-active-bridge(DAB) soft-switching loss is discussed. Furthermore, a trend of DC-DC conversion efficiency is shown, and we show that the partial boost topology is a promising approach for achieving high efficiency dc-dc conversion.

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