Design &amp;amp; EM simulation of on-chip transformer baluns for RF power amplifiers

Current Mode Class-D Power Amplifiers (CMCD-PA) are attractive for fully integrated PA implementation as the output capacitance of the active device can be absorbed in the output matching network that can be realized with minimum number of components. This paper presents a simplified design approach for CMCD PA design using an integrated balun transformers. Also, expressions are derived for the optimum device sizing for second harmonic suppression resulting in improved efficiency. The amplifier is implemented in 130 nm CMOS process and encapsulated in QFN package. Measurement results show that the amplifier exhibits broadband response between 1.4 GHz and 2.1 GHz with peak output power of 26.8 dBm at 1.8 GHz using a 2.4 V supply. PAE remains above 40% for the entire range while peak PAE and drain efficiency are 45% and 48%, respectively. Index Terms -Current Mode Class-D, ClassE/F odd , Balun, CMOS, Efficiency, broadband. I.978-1-4799-4885-7/14/$31.00 ©2014 IEEE

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Design & EM simulation of on-chip transformer baluns for RF power amplifiers

Cited by 3 publications

References 6 publications

Design of a broadband current mode class-D power amplifier with harmonic suppression

Design of a broadband current mode class-D power amplifier with harmonic suppression

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Design of a broadband Current Mode Class-D Power Amplifier with harmonic suppression

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