Deriving a Methodology for Code Deployment on Multi-Core Platforms via Iterative Manual Optimizations

Abstract

In recent years, there has been what can only be described as an explosion in the types of processing devices one can expect to find within a given computer system. These include the multi-core CPU, the General Purpose Graphics Processing Unit (GPGPU) and the Accelerated Processing Unit (APU), to name but a few. The widespread uptake of these systems presents would-be users with at least two problems. Firstly, each device exposes a complex underlying architecture which must be appreciated in order to attain optimal performance. This is coupled with the fact that a single system can support an arbitrary number of such devices. Consequently, fully leveraging the performance capabilities of such a system must come at a cost -increasingly prolonged development times. Adhering to a methodology will have the significant industrial impact of reducing these development times. This paper describes the continued formulation of such a novel methodology. Two real world scientific programs are optimized for execution on the CUDA platform. Double precision accuracy and optimized speedups (which include PCI-E transfer times) of 15x and 17x are achieved.

Paralysis: An Extensible Multi-tiered Guidance Environment for Program Parallelization and Analysis

“…A number of tasks which had to be performed manually as part of previous work [1] have been automated and integrated successfully. Speedups of 15x and 22x have been achieved.…”

“…By way of example, an attempt is made to parallelize one of the embarrassingly parallel programs discussed in previous work [1], namely Racah, using an OpenACC [22] compliant compiler. The compiler is unable to parallelize the program due to the presence of two while loops, despite the fact that there is no alternative means of expressing the functionality that these loops perform.…”

“…In each case, Paralysis analyzes a number of different algorithms on the host system. Thereafter, each algorithm is manually ported for CUDA execution and tuned using the techniques described in previous work [1]. All programs are compiled with the -O2 option and executed on a Windows 7 64-bit system with 4 GB of system memory.…”

“…Forward application of the Discrete Fourier Transform to the complex number sequence x = x 0 , … x N-1 produces a second complex number sequence X = X 0 , … X N-1 such that: (1) where N is the length of the two sequences, x represents a function in the time domain and X represents a function in the frequency domain.…”

“…Table II shows the performance of the programs for image sizes of 2048, 4096 and 8192 pixels, where the blur radius is the image size multiplied by a factor of 0.01. To summarize, Paralysis has enabled suitable algorithms to be identified more quickly by automating certain techniques which had to be performed manually as part of previous work [1].…”