Derivative-Free Direct Search Optimization Method for Enhancing Performance of Analytical Design Approach-Based Digital Controller for Switching Regulator

Abstract

Although an analytical design approach-based digital controller—which is essentially a deadbeat controller—shows zero steady-state error and no intersampling oscillations, it takes a finite number of sampling periods to settle down to a steady-state value. This paper describes the application of a derivative-free Nelder–Mead (N–M) simplex method to the digital controller for retuning of its coefficients intelligently to ensure improved settling and rise times without disturbing the deadbeat controller characteristics (i.e., no ripples between the sampling periods and no steady-state error). A switching-mode buck regulator working at 1 MHz in continuous conduction mode (CCM) is considered as a plant. Numerical simulation results depict that the N–M algorithm-based optimized digital controller not only shows improved steady-state and transient performance but also guarantees rigorous robustness against model uncertainty and disturbance as compared to its traditional counterpart, as well as the other optimized digital controller fine-tuned through other derivative-free metaheuristic optimization techniques, such as the genetic algorithm (GA). A system generator-based hardware software co-simulation is also performed to validate the simulation results.

Multivariable Unconstrained Pattern Search Method for Optimizing Digital PID Controllers Applied to Isolated Forward Converter

“…Using these parameter values in Equation (35) and performing some algebraic manipulations, we obtain the following PID controller in a continuous domain.…”

“…Rather than using direct programming (DP), standard programming (SP) is employed here to realize the controller. SP uses only n delay elements, whereas DP uses m + n, where m and n denote the number of zeros and poles, respectively, such that m ≤ n [35].…”

“…Energies 2021, 14, x FOR PEER REVIEW 22 of 25 the controller. SP uses only n delay elements, whereas DP uses m + n, where m and n denote the number of zeros and poles, respectively, such that m ≤ n [35]. A synthesizable VHDL block representing the hardware co-simulation library is then generated automatically and is loaded into the Artix-7 board (see Figure 13).…”

Design and FPGA realization of incremental fuzzy controller for stirred tank heater

“…Xilinx system generator (XSG) is an integrated design environment (IDE) that can simplify FPGA design flow a lot better [10]. It is an add on to Simulink that enables designers to easily convert their computation into discrete time using Xilinx blocks and simulate directly on the MATLAB/Simulink environment [11].…”