Deploying Hardware Locks to Improve Performance and Energy Efficiency of Hardware Transactional Memory

Gaona, Epifanio; Abellán, José Luis; Acacio, Manuel E.; Fernández, J.F.

doi:10.1007/978-3-642-36424-2_19

Cited by 1 publication

(3 citation statements)

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“…To do so, we show the size of the structures needed by them in order to demonstrate the superior scalability of our proposal. In the last part, we explain the implementation of our GCommit architecture presented in [19], that leverages a state-of-the-art G-lines technology, utilizing a cost-effective mainstream industrial synthesis toolflow with an STMicroelectronics 45 nm standard cell technology library.…”

Section: Gcommit For Efficient Commits In Lazy-lazy Htm Systemsmentioning

confidence: 99%

“…In [19], we introduce our GCommit protocol utilizing a state-of-the-art fullcustom technology, namely G-lines. We demonstrated that our proposal reported minimal area overhead, energy consumption and very fast operation.…”

Section: G-arbiter Manufactured Using An Industrial Synthesis Toolflowmentioning

confidence: 99%

“…A preliminary version of this work was presented in [19], where we basically introduced our proposal and demonstrated through full-system simulation that STCC-SEQ can be improved by a hardware-based solution. In this work, apart of including more detailed explanations to help the reader understand how GCommit actually operates, we highlight the following contributions:…”

Section: Introductionmentioning

confidence: 99%

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Fast and efficient commits for Lazy-Lazy hardware transactional memory

2015

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Transactional Memory (TM) is a compelling alternative to simplify multi-threaded programming that traditionally relies on error-prone lockbased synchronization for implementing cooperative tasks. Lazy-Lazy hardware TM is one of the most efficient schemes in today's Hardware TM systems (HTMs). Nonetheless, the commit protocol in these systems has severe impact on performance and energy. The SEQ in Scalable TCC implementation (STCC-SEQ) is the most popular and efficient commit protocol to date. In this paper, we propose GCommit, a cost-effective hardware-based STCC-SEQ protocol. GCommit employs a G-Arbiter microarchitecture for achieving minimal-latency and high-efficient commits. We implement G-Arbiter with a standard 45 nm cell library. For a target 16-core CMP, a G-Arbiter just represents 0.07% of the whole on-chip area, requiring marginal energy consumption. Full-system simulations of the target system with the STAMP benchmarks show that GCommit achieves average reductions of 15.7% and 13.7% in execution time and energy, respectively, when compared with STCC-SEQ.

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Section: Gcommit For Efficient Commits In Lazy-lazy Htm Systemsmentioning

confidence: 99%

Section: G-arbiter Manufactured Using An Industrial Synthesis Toolflowmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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