Dependability evaluation of SISO control-theoretic power managers for processor architectures

Shahosseini, Sina; Moazzemi, Kasra; Rahmani, Amir M.; Dutt, Nikil

doi:10.1109/norchip.2017.8124983

Cited by 7 publications

(6 citation statements)

References 14 publications

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“…Conventional control theory methods proposed for resource management use Single Input Single Output (SISO) controllers for the ease in deployment and the guarantees they provide in tracking the target output. These SISO controllers use Proportional Integral (PI), Proportional Integral Derivative (PID), or lead-lag implementations [22]. Figure 6.5 depicts a first-order feedback SISO controller which can be deployed either as a PI or a PID controller.…”

Section: Single Input Single Output Controllersmentioning

confidence: 99%

Reflecting on Self-Aware Systems-on-Chip

Donyanavard

Mück

Moazzemi

et al. 2020

A Journey of Embedded and Cyber-Physical Systems

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Introduction to Self-Aware Systems-on-ChipWe are seeing an increasing number of complex cyber-physical systems (CPS) deployed for various applications, such as road-traffic control involving communicating autonomous cars and infrastructure, or smart grids controlling energy delivery down to the individual device. These distributed applications follow common design objectives, such as energy-efficiency, and require guarantees for high availability, real time or safety. In this context, autonomy is crucial: multiple system goals varying over time need to be adaptively managed and objectives holistically coordinated. By empowering future CPS with self-awareness, these systems promise to dynamically adapt, learn, and manage unforeseen changes [6].

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Section: Single Input Single Output Controllersmentioning

confidence: 99%

Reflecting on Self-Aware Systems-on-Chip

Donyanavard

Mück

Moazzemi

et al. 2020

A Journey of Embedded and Cyber-Physical Systems

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“…Since then, the majority of operating systems have simple settings to benefit from DVFS even in embedded devices. A feedback control was used by Shahosseini et al (2017) to manage the power consumption using DVFS knobs.…”

Section: Dvfs and Power Gatingmentioning

confidence: 99%

On-Chip Dynamic Resource Management

Miele

Kanduri²,

Moazzemi³

et al. 2019

FNT in Electronic Design Automation

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The need for dynamic resource management has shadowed the exponential growth of on-chip transistor capacity, and the challenge is accentuated by the heterogeneity of resources, and the bewildering variety of constraints and requirements of applications, platforms and users. The field has started with a few research papers in the early 1990s but has grown today to over hundred yearly publications, leading to an accumulated body of literature presumable far above 1000 papers. We focus on the dynamic (run-time) management of onchip resources and mostly ignore design-time techniques and off-chip resources of larger electronic systems. Moreover, we do not attempt a complete review of all published work on the topic. Rather, this survey provides a structured review and discussion of the state of the art and is divided along the primary objectives of resource management techniques: performance, power, reliability and quality of service, each

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“…They discuss the shortcomings of ad-hoc and heuristic-based approaches in addressing some of the attributes such as lack of guarantees, the need for exhaustive training and close to reality models, just to mention a few. There are a number of control theoretic approaches ( [8], [9], [10], [34], [35], [36], [37], [38], [39], [40]) that provide formal and efficient means to address robustness and testability for managing computer systems. The most successful of these concurrently coordinate and control multiple goals and actuators in a non-conflicting manner by adding an ad-hoc component to a controller or hierarchical loops.…”

Section: B Evaluationmentioning

confidence: 99%

Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores

Mück

Donyanavard

Moazzemi

et al. 2018

IEEE Trans. Multi-Scale Comp. Syst.

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Heterogeneous multicore processors (HMPs) are commonly deployed to meet the performance and power requirements of emerging workloads. HMPs demand adaptive and coordinated resource management techniques to control such complex systems. While Multiple-Input-Multiple-Output (MIMO) control theory has been applied to adaptively coordinate resources for single-core processors, the coordinated management of HMPs poses significant additional challenges for achieving robustness and responsiveness, due to the unmanageable complexity of modeling the system dynamics. This paper presents, for the first time, a methodology to design robust MIMO controllers with rapid response and formal guarantees for coordinated management of HMPs. Our approach addresses the challenges of: (1) system decomposition and identification; (2) selection of suitable sensor and actuator granularity; and (3) appropriate system modeling to make the system identifiable as well as controllable. We demonstrate the practical applicability of our approach on an ARM big.LITTLE HMP platform running Linux, and demonstrate the efficiency and robustness of our method by designing MIMO-based resource managers.

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Dependability evaluation of SISO control-theoretic power managers for processor architectures

Cited by 7 publications

References 14 publications

Reflecting on Self-Aware Systems-on-Chip

Reflecting on Self-Aware Systems-on-Chip

On-Chip Dynamic Resource Management

Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores

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