Demonstration of an analogue domain processing IC for carrier phase recovery and compensation in coherent links

Ashok, Rakesh; Manikandan, Sarath; Chugh, Shivangi; Goyal, Sandeep; Kamran, Rashmi; Gupta, Shalabh

doi:10.1364/ofc.2019.w2a.31

Cited by 10 publications

(7 citation statements)

References 5 publications

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“…Other critical blocks at the receiver side are also being investigated successfully. For example, an analog domain Costas loop-based CPRC IC demonstration has been reported quite recently in [16]. These results give a clear indication that all-analog signal processing is a good solution for the power consumption-sizecost problem of the DCI transceivers.…”

Section: B Post Layout Simulation Results At 100 Gb/s Data Ratementioning

confidence: 81%

“…Another work demonstrates a 40 Gb/s OPLL based analog coherent binary phase-shift keying receiver that uses the integration of electronic and photonic integrated circuits (ICs) to eliminate the usage of DSP for carrier offset removal [14]. Further, a technique to achieve carrier phase synchronization using analog signal processing based IC, phase modulator, and tunable lasers has been demonstrated [16]. These receivers (in [14,16]) use OPLL for phase and frequency offsets correction to achieve significant power savings by removing DSP completely.…”

Section: Introductionmentioning

confidence: 99%

“…Further, a technique to achieve carrier phase synchronization using analog signal processing based IC, phase modulator, and tunable lasers has been demonstrated [16]. These receivers (in [14,16]) use OPLL for phase and frequency offsets correction to achieve significant power savings by removing DSP completely. From the literature, it may be summarized that miniaturized analog coherent transceiver using electronic and photonic integration is a solution for the power dissipation-size-cost problem in the future generation DCIs.…”

Section: Introductionmentioning

confidence: 99%

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All-Analog Adaptive Equalizer for Coherent Data Center Interconnects

Nambath

Ashok

Manikandan

et al. 2020

J. Lightwave Technol.

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We present the detailed architecture of an allanalog adaptive equalizer for low-power analog signal processing based coherent optical dual-polarization quadrature phase-shift keying transceivers. The proof of concept equalizer uses the constant modulus algorithm for weight coefficient update. The equalizer, implemented in a 130 nm SiGe BiCMOS technology for 100 Gb/s operation, occupies ∼1.4 mm × 1.35 mm area and draws 1 A current from a 2.5 V supply. Its functionality is validated experimentally for data rates up to 40 Gb/s and by using postlayout circuit simulations for data rates up to 100 Gb/s. The equalizer output after processing with a behavioral Costas loopbased carrier phase recovery and compensation module shows bit error rates well within the hard-decision forward error correction limit for 40 Gb/s single-mode fiber links of length up to 10 km. Performance and power consumption of the equalizer are expected to improve when implemented in advanced CMOS or FinFET technologies. The simple architecture of the analog domain equalizer makes it suitable for analog coherent shortreach interconnects with length less than 10 km and carrier wavelengths of either 1310 nm or 1550 nm.

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Section: B Post Layout Simulation Results At 100 Gb/s Data Ratementioning

confidence: 81%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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All-Analog Adaptive Equalizer for Coherent Data Center Interconnects

Nambath

Ashok

Manikandan

et al. 2020

J. Lightwave Technol.

Self Cite

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“…Due to the path length difference, laser linewidth, and polarization mode dispersion, time varying phase offset is introduced between S and LO, which has to be removed using phase synchronization. Analog signal processing based phase synchronization technique with the aid of conventional PM is demonstrated in [6]. However, due to the bounded phase delay provided by conventional PM, the loop fails to track the phase offset when it exceeds a few radians.…”

Section: Eopd For Phase Synchronization In a DCImentioning

confidence: 99%

“…E LECTRO-OPTIC phase modulators (PMs) are essential components in optical communication links, optical wireless access networks, and radars and beam-forming antenna phased arrays based transceivers [1]- [3]. The PMs in these systems are used for (but not limited to) generating optical phase shift, phase synchronization, frequency comb generation, and frequency stabilization of lasers [4]- [6]. Depending on the application, PMs are evaluated based on the performance metrics that include drive voltage, half-wave voltage, electrical modulation bandwidth, optical bandwidth, dynamic range, extinction ratio (modulation depth), and linearity [7].…”

Section: Introductionmentioning

confidence: 99%

Endless optical phase delay based phase synchronization in low-power coherent DCIs

Ashok

Naaz

Kamran

et al. 2020

2020 IEEE Photonics Conference (IPC)

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In this work, we propose and demonstrate a module to linearly add an arbitrary amount of continuous (reset-free) phase delay to an optical signal. The proposed endless optical phase delay (EOPD) uses an optical IQ modulator and control electronics (CE) to add the desired amount of phase delay that can continuously increase with time. In order to adjust for the bias voltages and control voltage amplitudes in the EOPD, some of which may be time varying, a multivariate gradient descent algorithm is used. The EOPD has been demonstrated experimentally, and its use in a high-capacity data center interconnect (DCI) application has been outlined in this letter. The EOPD may find its use in many other applications that require precise phase/frequency adjustments in real-time.

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High-Capacity Coherent DCIs Using Pol-Muxed Carrier and LO-Less Receiver

Kamran

Naaz

Goyal

et al. 2020

J. Lightwave Technol.

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A PAM 4 based direct detection system has been standardized for short-distance data center interconnects because of its simple architecture. Performance of the PAM 4 systems is limited for high dispersion values or demands complicated signal processing for further increase in data rates. A polarization multiplexed carrier based self-homodyne (PMC-SH) link with adaptive polarization control is a practical approach with an laser oscillator (LO)-less and carrier phase recovery (CPR)-free coherent receiver that can replace PAM 4 links for achieving high data rates. We analytically find that PMC-SH scheme results in a significantly better BER for a given transmission rate or can achieve doubling of the data rate for given bandwidth of electronics and laser power (when compared with PAM 4). Practical implementation of the proposed system with adaptive polarization control is also discussed. Presented theoretical frame work highlights the advantages of such self-homodyne systems over PAM 4 based systems in terms of SNR requirements and capacity.Index Terms-PAM 4 links, data center interconnects, selfhomodyne system, polarization multiplexed carrier.

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Demonstration of an analogue domain processing IC for carrier phase recovery and compensation in coherent links

Cited by 10 publications

References 5 publications

All-Analog Adaptive Equalizer for Coherent Data Center Interconnects

All-Analog Adaptive Equalizer for Coherent Data Center Interconnects

Endless optical phase delay based phase synchronization in low-power coherent DCIs

High-Capacity Coherent DCIs Using Pol-Muxed Carrier and LO-Less Receiver

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