Demonstration of a silicon gated field emitter array based low frequency Colpitts oscillator at 400 °C

Bhattacharya, Ranajoy; Hay, Robert W.; Cannon, Mason; Karaulac, Nedeljko; Rughoobur, Girish; Akinwande, Akintunde I.; Browning, Jim

doi:10.1116/6.0002272

Cited by 5 publications

(11 citation statements)

References 32 publications

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“…For the output characteristics, the V C was swept from 0 to 200 V, and for the transfer characteristics, the V G was swept from 0 to 40 V. For all the tests, V E was kept at the ground. The results were used to develop an appropriate VT model, and the details can be found in our previous work [17], where we developed, simulated, and experimentally validated a 152 kHz Colpitts oscillator. This validation provides confidence in our circuit design.…”

Section: I-v Characterization Experimentsmentioning

confidence: 99%

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Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits

Hay,

Bhattacharya,

Chern

et al. 2023

Applied Sciences

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Vacuum transistors (VTs) are promising candidates in electronics due to their fast response and ability to function in harsh environments. In this study, several oscillator and logic gate circuit simulations using VTs are demonstrated. Silicon-gated field emitter arrays (Si-GFEAs) with 1000 × 1000 arrays were used experimentally to create a VT model. First, transfer and output characteristics sweeps were measured, and based on those data, an LTspice vacuum transistor (VT) model was developed. Then, the model was used to develop Wein and Ring oscillator circuits. The circuits were analytically simulated using LTspice, where the collector bias voltage was 200 V DC, and the gate bias voltage was 30–40 V DC. The Wein oscillator circuit produced a frequency of 102 kHz with a magnitude of 26 Vpp. The Ring oscillator produced a frequency of 1.14 MHz with a magnitude of 4 Vpp. Furthermore, two logic circuits, NOR and NAND gates, were also demonstrated using LTspice modeling. These simulation results illustrate the feasibility of integrating VTs into functional integrated circuits and provide a design approach for future on-chip vacuum transistors applied in logic or radio-frequency (RF) devices.

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Section: I-v Characterization Experimentsmentioning

confidence: 99%

“…To realize functional circuits, it is required to develop a simulation model to inspect VTs in terms of functional circuits such as oscillators [17] and high-speed logic gates [18]. In this study, the circuit modeling software LTspice XVII v17.0 was used to create an electronic model of VTs [9,18].…”

Section: Introductionmentioning

confidence: 99%

Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits

Hay,

Bhattacharya,

Chern

et al. 2023

Applied Sciences

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“…Field emitter array has important applications in field emission display [1][2][3][4][5], parallel electron-beam lithography [6][7][8][9], and X-ray source [10][11][12][13][14][15]. Until now, only CNT [16], Si nanotip [17], and ZnO nanowire [18] have been active in studies of field emitter array applications. Among them, ZnO nanowire has advantages in terms of its simple synthesis method, low cost, high uniformity, and compatibility with microfabrication techniques, which makes it outstanding in large-area gated field emitter arrays [18].…”

Section: Introductionmentioning

confidence: 99%

Modeling the Temporal Response of Gated ZnO Nanowire Field Emitter by Considering the Charging and Self-Heating Effect for Improving the Response Speed

Chen,

Wang,

Song

et al. 2024

Electronics

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ZnO nanowire is a promising candidate for large-area gated field emitter arrays. How to improve its temporal response is one of the key problems to be solved for applications. In this work, a device model for a gated ZnO nanowire field emitter with consideration of charging and self-heating effect has been established to investigate its temporal response. It is found that while the charging effect is responsible for the delay at the beginning of the pulse, the self-heating effect which induces delay due to the thermal conduction process can shorten the charging time because of its lowering of nanowire resistance. The response time can be minimized when these two effects are balanced at an optimal field which is below the critical field for thermal runaway. We further investigate the optimal response time of a nanowire with the same resistance but a different length, radius, and electrical properties. The results imply that a lower heat capacity and higher critical temperature for thermal runaway are in favor of a shorter response time, which must be taken into account in the reduction in nanowire resistance for improving response speed. All the above should be useful for the device design of a fast-response gated ZnO nanowire field emitter array.

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“…Together with their low power consumption [5][6][7], fast switching frequency [5][6][7], and low thermal load [5][6][7], they can replace thermal emitters in many applications, as well as open up completely new fields. Attractive applications include X-ray devices [8,9], terahertz sources [10,11], or vacuum channel transistors [12,13], among others.…”

Section: Introductionmentioning

confidence: 99%

“…Due to their well-established fabrication methods and integrability into existing technology, silicon-based FEAs are therefore still being studied theoretically and experimentally [13,22].…”

Section: Introductionmentioning

confidence: 99%

Quantitative Field Emission Imaging for Studying the Doping-Dependent Emission Behavior of Silicon Field Emitter Arrays

Schels,

Herdl,

Hausladen

et al. 2023

Micromachines

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Field emitter arrays (FEAs) are a promising component for novel vacuum micro- and nanoelectronic devices, such as microwave power amplifiers or fast-switching X-ray sources. However, the interrelated mechanisms responsible for FEA degradation and failure are not fully understood. Therefore, we present a measurement method for quantitative observation of individual emission sites during integral operation using a low-cost, commercially available CMOS imaging sensor. The emission and degradation behavior of three differently doped FEAs is investigated in current-regulated operation. The measurements reveal that the limited current of the p-doped emitters leads to an activation of up to 55% of the individual tips in the array, while the activation of the n-type FEA stopped at around 30%. This enhanced activation results in a more continuous and uniform current distribution for the p-type FEA. An analysis of the individual emitter characteristics before and after a constant current measurement provides novel perspectives on degradation behavior. A burn-in process that trims the emitting tips to an integral current-specific ideal field enhancement factor is observed. In this process, blunt tips are sharpened while sharp tips are dulled, resulting in homogenization within the FEA. The methodology is described in detail, making it easily adaptable for other groups to apply in the further development of promising FEAs.

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Demonstration of a silicon gated field emitter array based low frequency Colpitts oscillator at 400 °C

Cited by 5 publications

References 32 publications

Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits

Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits

Modeling the Temporal Response of Gated ZnO Nanowire Field Emitter by Considering the Charging and Self-Heating Effect for Improving the Response Speed

Quantitative Field Emission Imaging for Studying the Doping-Dependent Emission Behavior of Silicon Field Emitter Arrays

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