Demonstration of a quantum logic gate in a cryogenic surface-electrode ion trap

Wang, Shannon X.; Labaziewicz, Jaroslaw; Ge, Yufei; Shewmon, Ruth; Chuang, Isaac L.

doi:10.1103/physreva.81.062332

Cited by 34 publications

(34 citation statements)

References 44 publications

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“…8,110 These small error-correcting procedures only require 17-25 total ions per logical qubit to generate fault-tolerant circuits that can have error thresholds near 10 − 3 . This error rate is compatible with the best current ion trap gates and measurements 20,25,26,[64][65][66] , and the whole procedure can easily fit within a single ELU. These small codes are only guaranteed to correct single errors, so the total number of reliable, but non-universal, operations on many logical qubits will scale as the error threshold divided by the square of the physical error per operation.…”

Section: Topology Of Interactionsmentioning

confidence: 60%

“…61 The design and fabrication of complex surface traps using silicon microfabrication processes has now matured, with examples of the Sandia high-optical access (HOA) trap 62 and the GTRI/Honeywell ball-grid array (BGA) trap 63 shown in Figure 3. Recent experiments have demonstrated high-performance qubit measurement 20 and single-qubit quantum gates [64][65][66] in such microfabricated surface traps that outperform conventional manually assembled macroscopic traps. The ability to design and simulate the electromagnetic trapping parameters prior to fabrication provides an attractive path to developing complex trap structures that are both repeatable and produced with high yield.…”

Section: Integration Technologies For Trapped Ion Quantum Computersmentioning

confidence: 99%

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Co-designing a scalable quantum computer with trapped atomic ions

2016

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The first generation of quantum computers are on the horizon, fabricated from quantum hardware platforms that may soon be able to tackle certain tasks that cannot be performed or modelled with conventional computers. These quantum devices will not likely be universal or fully programmable, but special-purpose processors whose hardware will be tightly co-designed with particular target applications. Trapped atomic ions are a leading platform for first-generation quantum computers, but they are also fundamentally scalable to more powerful general purpose devices in future generations. This is because trapped ion qubits are atomic clock standards that can be made identical to a part in 10 15 , and their quantum circuit connectivity can be reconfigured through the use of external fields, without modifying the arrangement or architecture of the qubits themselves. In this forwardlooking overview, we show how a modular quantum computer with thousands or more qubits can be engineered from ion crystals, and how the linkage between ion trap qubits might be tailored to a variety of applications and quantum-computing protocols. Quantum information processors have the potential to perform computational tasks that are difficult or impossible using conventional modes of computing. 1-3 In a radical departure from classical information, the qubits of a quantum computer can simultaneously store bit values 0 and 1, and when measured they probabilistically assume definite states. Many interacting qubits, isolated from their environment, can represent huge amounts of information: there are exponentially many binary numbers that can co-exist, with entangled qubit correlations that can behave as invisible wires between the qubits. Even in the face of Moore's Law, or the doubling in conventional computer power every year or two, the complexity of massively entangled quantum states of just a few hundred qubits can easily eclipse the capacity of classical information processing. 4 There are but a few known applications that exploit this quantum advantage, such as Shor's factoring algorithm, 5 and future quantum information processors will likely be applied to special-purpose applications. On the other hand, a quantum computer has not yet been built; therefore, new quantum applications and algorithms will likely follow from the evolution and capability of quantum hardware.In the 20 years since the advent of Shor's algorithm 5 and the discovery of quantum error correction, 6-8 there has been remarkable progress in demonstrations of entangling quantum gates on o10 qubits in certain physical systems. Current efforts aim to scale to hundreds, thousands or even millions of interacting qubits. Unlike the classical scaling of bits and logic gates, however, large quantum systems are not comparable to the behaviour of just a few qubits. Just because 2 or 4 qubits can be completely controlled with negligible errors does not mean that this system can readily scale to 4100 qubits.In the last few years, two particular quantum hardware platforms have e...

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Section: Topology Of Interactionsmentioning

confidence: 60%

Section: Integration Technologies For Trapped Ion Quantum Computersmentioning

confidence: 99%

Co-designing a scalable quantum computer with trapped atomic ions

2016

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“…By comparison, the surface electrode linear Paul trap design that has recently attracted much attention in the context of quantum computing [28,29] has a q parameter and a trap depth that are approximately a factor 1 2 √ 3 and 1 72 , respectively, of the four-rod linear Paul trap [7].…”

Section: Trap Optimization and Resultsmentioning

confidence: 99%

Surface-electrode point Paul trap

et al. 2010

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We present a model as well as experimental results for a surface electrode radiofrequency Paul trap that has a circular electrode geometry well suited for trapping single ions and two-dimensional planar ion crystals. The trap design is compatible with microfabrication and offers a simple method by which the height of the trapped ions above the surface may be changed in situ. We demonstrate trapping of single 88 Sr + ions over an ion height range of 200-1000 µm for several hours under Doppler laser cooling and use these to characterize the trap, finding good agreement with our model.

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“…Their suitability has been well demonstrated with state preparation and detection [13][14][15][16][17]; qubit entanglement, gates, and error correction [18][19][20][21][22][23][24][25][26][27]; and transport of ions within ion trap arrays [28][29][30][31][32][33][34][35][36]. Development of scalable traps that can encompass all of these operations is now the next stage toward more practical systems incorporating microfabricated chip traps [36][37][38][39][40][41][42][43][44][45][46][47], but realizing experimental setups can be challenging.…”

Section: Introductionmentioning

confidence: 99%

Versatile ytterbium ion trap experiment for operation of scalable ion-trap chips with motional heating and transition-frequency measurements

et al. 2011

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This version is available from Sussex Research Online: http://sro.sussex.ac.uk/38820/ This document is made available in accordance with publisher policies and may differ from the published version or from the version of record. If you wish to cite this item you are advised to consult the publisher's version. Please see the URL above for details on accessing the published version. Copyright and reuse:Sussex Research Online is a digital repository of the research output of the University.Copyright and all moral rights to the version of the paper presented here belong to the individual author(s) and/or other copyright owners. To the extent reasonable and practicable, the material made available in SRO has been checked for eligibility before being made available.Copies of full text items generally can be reproduced, displayed or performed and given to third parties in any format or medium for personal research or study, educational, or not-for-profit purposes without prior permission or charge, provided that the authors, title and full bibliographic details are credited, a hyperlink and/or URL is given for the original metadata page and the content is not changed in any way. We present the design and operation of an ytterbium ion trap experiment with a setup offering versatile optical access and 90 electrical interconnects that can host advanced surface and multilayer ion trap chips mounted on chip carriers. We operate a macroscopic ion trap compatible with this chip carrier design and characterize its performance, demonstrating secular frequencies >1 MHz, and trap and cool nearly all of the stable isotopes, including 171 Yb + ions, as well as ion crystals. For this particular trap we measure the motional heating rate ṅ and observe an ṅ ∝1/ω 2 behavior for different secular frequencies ω. We also determine a spectral noise density S E (1 MHz) = 3.6(9) × 10 −11 V 2 m −2 Hz −1 at an ion electrode spacing of 310(10) µm. We describe the experimental setup for trapping and cooling Yb + ions and provide frequency measurements of the 2 S 1/2 ↔ 2 P 1/2 and 2 D 3/2 ↔ 3 D[3/2] 1/2 transitions for the stable 170 Yb + , 171 Yb + , 172 Yb + , 174 Yb + ,a n d 176 Yb + isotopes which are more precise than previously published work.

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Demonstration of a quantum logic gate in a cryogenic surface-electrode ion trap

Cited by 34 publications

References 44 publications

Co-designing a scalable quantum computer with trapped atomic ions

Co-designing a scalable quantum computer with trapped atomic ions

Surface-electrode point Paul trap

Versatile ytterbium ion trap experiment for operation of scalable ion-trap chips with motional heating and transition-frequency measurements

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