Demonstration of 3D Convolution Kernel Function Based on 8-Layer 3D Vertical Resistive Random Access Memory

Security and Communication Networks

2022

For long-distance running tactics, a computer vision-based motion correction solution is presented. The depth information is merged into the KCF algorithm to enhance it, which overcomes the classic KCF method’s incapacity to tackle the tracking drift issue caused by occlusion and extracts the technical features of long-distance running motions. Based on computer vision, the posture area of long-distance runners is detected, and the technical movements of long-distance runners are recognized. Calculate the centroid coordinates of the wrong technical movement correction area in long-distance running, and generate a tracking image of the wrong technical movement in long-distance running. The foreground and background information of the image is separated by the optical flow feature of machine vision, and the motion trajectory of the long-distance running error technique is extracted, and the motion correction of the long-distance running technique based on computer vision is realized. The experimental results show that the method in this paper has better accuracy in extracting long-distance running motion features and can accurately identify and correct the technical movements of the long-distance running, the technical movements of the head, and the technical movements of the body balance, and the correction efficiency is high.

Section: Improved Kcf Algorithm Fusion Depth Informationmentioning

confidence: 99%

Convolutional Neural Network and Computer Vision-Based Action Correction Method for Long-Distance Running Technology

Security and Communication Networks

2022

“…As shown in Section 2, CNN is very successful in image recognition, and the convolutional computing can be demonstrated with memristive crossbar arrays. [149][150][151] Dong et al presented a specific circuit for the CNN with binary or multilevel memristive devices. [152] One kernel was represented by two rows of memristive devices and eight output currents were pooled and activated simultaneously for one value, which was regarded as the input of the FC layer.…”

Section: In Situ Training In Ann Acceleratorsmentioning

confidence: 99%

Artificial Neural Networks Based on Memristive Devices: From Device to System

Huang

Advanced Intelligent Systems

et al. 2020

Thanks to the advance in transistor scaling, computing capabilities of central processing units (CPUs) and graphics processing units (GPUs) have been increased greatly, resulting in the fast development of artificial neural networks (ANNs). ANNs predict the correlation between a set of input and output parameters by emulating the principles of biological neural networks. [1] Nowadays, ANNs have been applied to a broad spectrum, such as computer vision, natural language processing, autonomous driving, and decision making. Although ANNs are advantageous in some specific tasks, such as playing the game of Go, [2,3] the human brain outperforms ANNs in cognitive and classification tasks with fast speed and high power efficiency. The advantages of the human brain lie in the special architectures with high massive parallelism, spiking neurons, and enormous number of basic computing units of neurons (%10 11) and synapses (%10 15), whereas computers show high speed of basic operation and precision. [4] The massively parallel processing compensates the low speed of neurons and synapses, whereas spiking neurons compute more powerful than other types of neurons. [5] The parallel processing occurs based on variable synaptic weights, which is the basis of memory. Moreover, the same information is processed by many neurons and transmitted to a downstream neuron, which enhances the precision as well. Therefore, the human brain shows a salient feature, i.e., in-memory computing, suitable for high-performance applications with a large amount of data. In contrast, conventional digital computing systems face the Von Neumann bottleneck, because in the Von Neumann architecture, computing units and memory are separated, hindering the enhancement of ANNs. Thus, several novel architectures are promoted, such as brain-inspired computing (processing information based on spiking neurons, also called as spiking neural networks [SNNs]) and in-memory computing on chip, to overcome the Von Neumann bottleneck. [6] To implement the new architectures, artificial synapses and neurons are necessary. The massive parallelism of the brain takes advantage of a large number of neurons and synapses; however, the emulation of the functions of biological synapses and neurons requires tens of complement metal-oxide-semiconductor (CMOS) transistors. Therefore, it is urgent to realize synapses and neurons with a simplified method for the development of ANNs. [7] As synapses adjust their weights step-by-step repeatedly, synaptic devices need to exhibit analog switching behavior. [8] However, biological neurons show the analog membrane potential and generate the all-or-nothing rapidly, so both analog and digital devices are acceptable for the emulation of neurons. Many emerging devices have been proposed to develop ANNs based on hardware, e.g., memristive devices, phase change memories (PCMs), [9] magnetic random-access memories (MRAMs), [10] and ferroelectric field-effect transistors (FeFETs). [11] Each technology has its advantages and disadvantages. PCM and M...

“…Normal passive memristor crossbar arrays usually suffer from a dilemma between array size and sneak path current, which prevents them from being used to achieve DNNs with low device cost. [ 97,98 ] On the other hand, 2D planar arrays have limited device density and simplified connections compared to 3D arrays, which means 2D arrays are not beneficial to implement the complex topology of DNNs. Therefore, a very recent work by Lin et al has expanded a hardware‐implemented CNN into a tailored eight‐layer 3D memristor array, as shown in Figure 3c,d, to provide a high degree of functional complexity with a relatively negligible array size effect.…”

Section: Memristive Convolutional Acceleratormentioning

confidence: 99%

Recent Progress on Memristive Convolutional Neural Networks for Edge Intelligence

Qin

Bao

Advanced Intelligent Systems

et al. 2020

Recently, deep learning has shown substantial breakthroughs in various fields such as speech recognition, image and video classification, and natural language processing. [1-3] The explosive development of deep learning has promoted the convergence of this field with other disciplines. The progress has benefited from the update and improvement of models and theories in computer science, as well as the advancement of contemporary semiconductor chip technology. However, the limited bandwidth and computing resources of the traditional computer system greatly restrict the running speed when faced with the increasing scale of deep neural networks (DNNs). The traditional von Neumann architecture separates data storage and computing. Frequent and inefficient movement of data between the processor and memory or off-chip storage brings latency and energy consumption issues, while the mismatch between data transmission and data processing becomes a bottleneck in the implementation of deep learning in hardware. Due to the high-bandwidth and highparallelism requirements of deep learning, data-intensive artificial intelligence (AI) applications have been dominated by cloud computing; that is, edge devices act as data-collecting interfaces and pass data to clustered cloud computer centers for computing to achieve deep learning. [4] Such AI applications place high requirements on network bandwidth and latency, and take the privacy leakage issue to users. [5] For example, in areas with poor network conditions, Tesla's AI autonomous driving will become unreliable and even life-threatening. With the popularization of deep learning, the efficient AI applications that can be seen daily are becoming an urgent need. Edge intelligence is a concept relative to cloud intelligence. [6] Edge computing requires real-time intelligence on devices with strict budgets for energy consumption and device area, such as smart watches and drones. It pushes cloud services from the network core to the edge of the network that is closer to Internet-of-things (IoT) devices and data sources, and then builds up an end-to-end network. Physical proximity to the informationgeneration sources is the most crucial characteristic emphasized by edge computing, wherefore high energy efficiency, small size, low latency, and high privacy protection become valued characteristics for edge intelligence. [7-9] With the combination of hardware and AI, devices dedicated for deep learning have emerged. These devices are called neural network accelerators. The combination of a traditional complementary metal-oxide semiconductor (CMOS) and emerging nonvolatile memory provides a considerable wealth of possibilities for AI accelerators. [10-13] The use of memory technology as a synaptic weight matrix storage unit has set a foundation for the hardware implementation of neuromorphic computing systems. In some prominent AI chips, traditional memories have been utilized; for example,